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2026-05-16 - 03:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot3.osadl.org (updated Sat May 16, 2026 00:45:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
89992204148,45sleep20-21swapper/219:08:582
89632204171,22sleep30-21swapper/319:08:323
88842201169,21sleep10-21swapper/119:07:291
87312201168,22sleep00-21swapper/019:05:300
530221590,4sleep2937299cyclictest21:15:142
2980221550,2sleep20-21swapper/219:50:212
1393911220,1ptp4l30601-21sshd22:05:523
139391590,1ptp4l7649-21df23:35:133
9372995827,4cyclictest33-21ksoftirqd/222:00:252
937199589,9cyclictest24069-21date23:00:241
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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