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2026-06-10 - 00:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot3.osadl.org (updated Tue Jun 09, 2026 12:45:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491230165,22phc2sys0-21swapper/307:06:213
22092204171,22sleep00-21swapper/007:05:310
23102203169,22sleep20-21swapper/207:06:422
23972201168,22sleep10-21swapper/107:07:501
892221430,3sleep3291699cyclictest07:20:233
139391910,1ptp4l9078-21users11:50:283
1394918561,16phc2sys0-21swapper/307:10:013
139391690,1ptp4l391rcuc/309:55:503
58472610,2sleep20-21swapper/208:20:262
74852570,2sleep37488-21processes10:40:253
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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