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2024-04-19 - 13:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot3.osadl.org (updated Fri Apr 19, 2024 00:46:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1813222730,8sleep00-21swapper/019:05:100
8255911830,6ptp4l401ktimersoftd/319:08:293
128242860,4sleep212828-21unixbench_singl23:25:312
61602680,1sleep30-21swapper/323:15:003
228862670,4sleep09-21ksoftirqd/022:40:240
264432650,5sleep226447-21ptp4l19:20:292
264432650,5sleep226447-21ptp4l19:20:292
20477996431,9cyclictest9-21ksoftirqd/019:22:170
20477996431,9cyclictest9-21ksoftirqd/019:22:160
825591620,1ptp4l401ktimersoftd/321:56:483
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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