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2026-04-05 - 21:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot3.osadl.org (updated Sun Apr 05, 2026 12:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
107742208175,22sleep20-21swapper/207:06:542
107802204169,23sleep30-21swapper/307:07:003
108102203171,21sleep10-21swapper/107:07:231
108342198165,22sleep00-21swapper/007:07:410
110192168124,34sleep20-21swapper/207:10:002
217932710,2sleep10-21swapper/112:00:181
11311997032,6cyclictest9-21ksoftirqd/010:40:000
1131299662,27cyclictest6526-21grep10:20:241
1131299650,26cyclictest23566-21df_abs07:35:141
11311996530,6cyclictest9-21ksoftirqd/010:55:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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