You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-18 - 20:17
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sun Jan 18, 2026 12:45:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
619523390,9sleep341-21ksoftirqd/307:05:233
70042203170,22sleep00-21swapper/007:08:460
68482202169,22sleep10-21swapper/107:06:511
67662202169,22sleep20-21swapper/207:05:462
2175921600,4sleep2739499cyclictest10:05:152
197832610,2sleep10-21swapper/112:15:181
7393995825,7cyclictest25-21ksoftirqd/110:55:001
7393995216,4cyclictest25-21ksoftirqd/111:10:251
7393995215,5cyclictest25-21ksoftirqd/110:05:181
115222520,2sleep20-21swapper/208:30:272
739399518,3cyclictest25-21ksoftirqd/107:40:011
7393995133,4cyclictest25-21ksoftirqd/111:55:131
7393995118,7cyclictest25-21ksoftirqd/112:35:001
7393995024,7cyclictest25-21ksoftirqd/109:35:231
7393995020,10cyclictest25-21ksoftirqd/108:04:591
7393995014,9cyclictest25-21ksoftirqd/108:10:271
7393995013,10cyclictest25-21ksoftirqd/110:45:261
7393995013,10cyclictest25-21ksoftirqd/110:45:261
7393994917,4cyclictest25-21ksoftirqd/112:30:011
7393994916,7cyclictest25-21ksoftirqd/111:00:171
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional