You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-18 - 13:33
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sun Jan 18, 2026 00:45:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491204170,22phc2sys0-21swapper/319:06:043
186372202168,22sleep10-21swapper/119:06:551
185682202168,23sleep20-21swapper/219:06:002
186722201168,22sleep00-21swapper/019:07:150
1914921470,7sleep01917599cyclictest21:25:220
139391680,1ptp4l401ktimersoftd/323:33:533
19175996527,7cyclictest9-21ksoftirqd/020:50:000
19175996430,3cyclictest9-21ksoftirqd/023:29:590
177112640,6sleep01917599cyclictest22:30:170
1917699630,61cyclictest0-21swapper/122:13:331
19175996131,3cyclictest9-21ksoftirqd/019:15:010
19175996024,6cyclictest9-21ksoftirqd/021:55:270
19175995827,3cyclictest9-21ksoftirqd/022:40:010
19175995819,4cyclictest9-21ksoftirqd/019:20:260
19175995519,5cyclictest9-21ksoftirqd/023:45:260
19175995420,6cyclictest9-21ksoftirqd/000:05:290
19175995411,2cyclictest9-21ksoftirqd/020:55:180
19175995327,6cyclictest9-21ksoftirqd/022:55:160
19175995324,6cyclictest9-21ksoftirqd/019:40:190
19175995318,6cyclictest9-21ksoftirqd/000:28:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional