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2026-06-17 - 18:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Jun 17, 2026 12:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491211177,22phc2sys0-21swapper/307:05:023
281752204171,22sleep10-21swapper/107:05:061
281742204171,22sleep00-21swapper/007:05:050
281712204172,21sleep20-21swapper/207:05:032
139391670,1ptp4l401ktimersoftd/312:10:143
30604996225,6cyclictest33-21ksoftirqd/209:50:132
189502620,2sleep018914-21timerandwakeup08:55:250
30604996123,6cyclictest33-21ksoftirqd/211:55:212
30604996123,6cyclictest33-21ksoftirqd/211:55:212
30604995923,12cyclictest33-21ksoftirqd/210:30:012
30604995829,9cyclictest33-21ksoftirqd/207:45:232
30604995824,11cyclictest33-21ksoftirqd/209:05:122
30604995823,4cyclictest33-21ksoftirqd/207:25:172
30604995821,11cyclictest33-21ksoftirqd/209:25:142
30604995726,9cyclictest33-21ksoftirqd/212:35:232
140762570,2sleep00-21swapper/012:10:000
30604995623,4cyclictest33-21ksoftirqd/212:35:002
30604995523,4cyclictest33-21ksoftirqd/209:15:192
30604995520,11cyclictest33-21ksoftirqd/212:00:242
153902550,2sleep20-21swapper/212:10:192
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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