You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-26 - 09:15
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Thu Feb 26, 2026 00:46:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
62382209176,22sleep30-21swapper/319:07:193
63952205172,22sleep10-21swapper/119:09:221
62692203170,22sleep20-21swapper/219:07:412
62722201167,23sleep00-21swapper/019:07:430
2152221300,2sleep30-21swapper/300:06:053
139391700,1ptp4l27965-21irqstats00:20:183
673999679,17cyclictest0-21swapper/019:50:230
673999679,17cyclictest0-21swapper/019:50:220
673999597,11cyclictest22714-21fschecks_count00:10:130
673999587,16cyclictest21299-21/usr/sbin/munin19:40:200
673999577,10cyclictest10108-21timerwakeupswit22:35:250
673999576,18cyclictest1008-21ls00:30:250
8252550,2sleep30-21swapper/323:25:163
674299550,16cyclictest1300-21snmpd23:30:203
674299550,12cyclictest19186-21latency_hist21:50:003
674299540,17cyclictest0-21swapper/320:40:163
673999546,17cyclictest2778-21apt-get23:30:120
673999546,17cyclictest12349-21apt-get23:50:090
674299531,18cyclictest0-21swapper/320:20:183
673999536,16cyclictest29419-21apt-get00:25:120
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional