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2026-05-30 - 20:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat May 30, 2026 12:46:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1963223000,8sleep125-21ksoftirqd/107:05:271
200662202168,23sleep20-21swapper/207:09:352
200602202169,22sleep30-21swapper/307:09:323
200022202163,28sleep00-21swapper/007:08:450
1989121600,7sleep12053999cyclictest10:30:121
134391900,1getstats0-21swapper/307:14:453
139391740,0ptp4l401ktimersoftd/311:00:003
139391630,1ptp4l23057-21sed10:35:223
139391630,1ptp4l23057-21sed10:35:223
195152600,2sleep20-21swapper/210:30:002
140712600,2sleep20-21swapper/211:25:122
139391540,1ptp4l401ktimersoftd/311:03:183
139391540,1ptp4l401ktimersoftd/308:03:293
20541994715,4cyclictest33-21ksoftirqd/212:30:012
20541994424,18cyclictest33-21ksoftirqd/209:10:012
20541994424,18cyclictest33-21ksoftirqd/209:10:012
2054199441,4cyclictest33-21ksoftirqd/208:05:252
20541994411,3cyclictest33-21ksoftirqd/212:15:002
20539994438,4cyclictest14469-21cron08:05:011
20541994332,9cyclictest33-21ksoftirqd/207:25:272
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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