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2026-08-15 - 19:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Aug 15, 2026 12:45:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491228167,50phc2sys0-21swapper/307:05:423
46302203170,22sleep10-21swapper/107:05:021
66732202169,22sleep20-21swapper/207:08:532
64402199168,20sleep00-21swapper/007:05:490
268421710,7sleep1722199cyclictest11:30:141
676828363,10sleep10-21swapper/107:10:001
722399681,32cyclictest17016-21perl09:45:153
7221996819,6cyclictest25-21ksoftirqd/109:10:141
7219996834,9cyclictest9-21ksoftirqd/010:14:590
7221996624,6cyclictest25-21ksoftirqd/107:50:191
7221996620,5cyclictest25-21ksoftirqd/110:55:261
7219996631,7cyclictest9-21ksoftirqd/012:20:000
7219996630,6cyclictest9-21ksoftirqd/010:40:130
7222996524,11cyclictest33-21ksoftirqd/207:57:432
7219996531,7cyclictest9-21ksoftirqd/008:10:230
7219996531,6cyclictest9-21ksoftirqd/012:40:000
7219996529,11cyclictest9-21ksoftirqd/007:35:000
722399640,25cyclictest7536-21/usr/sbin/munin08:15:263
7222996428,5cyclictest33-21ksoftirqd/212:19:592
7219996430,4cyclictest9-21ksoftirqd/011:10:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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