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2026-08-20 - 23:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Thu Aug 20, 2026 12:45:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
324212207175,21sleep10-21swapper/107:06:431
324702205172,22sleep00-21swapper/007:07:220
139491205172,22phc2sys0-21swapper/307:09:573
305452203170,22sleep20-21swapper/207:05:032
88032680,2sleep10-21swapper/110:45:271
80782550,1sleep10-21swapper/111:50:251
247792530,2sleep30-21swapper/312:25:253
139391450,0ptp4l401ktimersoftd/307:56:363
519994438,4cyclictest13720-21latency_hist08:45:013
51699432,39cyclictest5133-21cron09:35:000
139391430,0ptp4l401ktimersoftd/307:11:363
517994136,3cyclictest25-21ksoftirqd/109:50:001
519993933,4cyclictest31878-21cron10:29:593
518993934,3cyclictest33-21ksoftirqd/207:25:002
517993935,2cyclictest25-21ksoftirqd/110:00:011
517993934,3cyclictest25-21ksoftirqd/110:55:121
517993928,9cyclictest25-21ksoftirqd/111:40:181
517993833,3cyclictest25-21ksoftirqd/111:15:121
517993833,3cyclictest25-21ksoftirqd/110:50:191
517993833,3cyclictest25-21ksoftirqd/110:50:191
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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