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2025-11-30 - 00:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Nov 29, 2025 12:45:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32402213181,21sleep20-21swapper/207:05:592
137191212178,22phc2sys0-21swapper/307:07:273
33482202169,22sleep10-21swapper/107:07:211
34642199166,22sleep00-21swapper/007:08:540
59298770,13rtkit-daemon0-21swapper/307:30:253
385499599,11cyclictest1989-21grep10:25:251
385499598,11cyclictest2192-21uniq11:35:171
385499596,20cyclictest8444-21hwlatdetect10:40:171
27432590,2sleep20-21swapper/208:15:142
145612580,6sleep2385599cyclictest09:45:202
3854995710,10cyclictest30722-21/usr/sbin/munin09:10:271
385499569,13cyclictest7834-21cat09:30:261
385499568,11cyclictest19250-21cat12:10:181
3854995610,12cyclictest18417-21/usr/sbin/munin08:45:241
385499557,11cyclictest18229-21taskset12:08:111
385499557,11cyclictest12659-21mailstats11:55:261
385499547,11cyclictest6614-21df_abs07:15:161
385499547,11cyclictest6614-21df_abs07:15:151
136991540,0ptp4l401ktimersoftd/307:10:113
136991530,1ptp4l401ktimersoftd/311:19:143
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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