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2026-06-13 - 16:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Jun 13, 2026 12:45:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
69172210176,22sleep30-21swapper/307:05:353
71642204172,21sleep20-21swapper/207:08:472
71622201168,22sleep00-21swapper/007:08:450
71582201168,22sleep10-21swapper/107:08:421
2320021410,6sleep3756299cyclictest09:55:203
139391550,1ptp4l401ktimersoftd/312:17:433
139391520,1ptp4l401ktimersoftd/311:58:213
134391480,8getstats756299cyclictest11:48:293
129092450,2sleep20-21swapper/210:40:282
756299446,3cyclictest41-21ksoftirqd/311:00:203
7562994413,4cyclictest41-21ksoftirqd/311:50:253
7561994414,28cyclictest28479-21kworker/2:212:10:232
139391440,0ptp4l401ktimersoftd/308:55:153
139391430,34ptp4l0-21swapper/307:10:003
7562994232,8cyclictest41-21ksoftirqd/308:05:193
7562994229,10cyclictest41-21ksoftirqd/311:40:273
7561994215,26cyclictest11250-21kworker/2:011:05:242
139391420,0ptp4l401ktimersoftd/310:15:173
756199410,3cyclictest28479-21kworker/2:211:25:332
57898410,2rtkit-daemon0-21swapper/110:27:041
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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