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2026-07-25 - 04:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Jul 25, 2026 00:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
117822231164,22sleep20-21swapper/219:08:022
139491229169,49phc2sys0-21swapper/319:05:133
116772205172,23sleep00-21swapper/019:06:390
115912203169,22sleep10-21swapper/119:05:401
981821540,6sleep31223099cyclictest22:25:193
139391790,1ptp4l15485-21users22:35:253
139391750,1ptp4l391rcuc/320:25:153
113852650,2sleep00-21swapper/023:35:210
82512590,5sleep09-21ksoftirqd/000:35:300
12227995723,4cyclictest9-21ksoftirqd/021:35:130
139391530,1ptp4l391rcuc/320:09:193
12227995220,4cyclictest9-21ksoftirqd/023:30:230
263912510,1sleep20-21swapper/220:45:172
12227995122,7cyclictest9-21ksoftirqd/020:00:010
12227995121,4cyclictest9-21ksoftirqd/021:25:170
12227995118,5cyclictest9-21ksoftirqd/019:25:000
12227995117,4cyclictest9-21ksoftirqd/023:40:150
12227995115,6cyclictest9-21ksoftirqd/022:55:250
12227995114,6cyclictest9-21ksoftirqd/021:15:240
12227995023,7cyclictest9-21ksoftirqd/022:05:150
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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