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2026-09-18 - 17:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Fri Sep 18, 2026 12:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491214170,33phc2sys0-21swapper/307:05:373
314712204171,22sleep10-21swapper/107:06:371
313882204170,23sleep00-21swapper/007:05:320
314002198165,22sleep20-21swapper/207:05:422
3173928364,10sleep30-21swapper/307:10:013
278782740,3sleep30-21swapper/309:15:173
92642610,4sleep10-21swapper/107:30:121
32032996126,4cyclictest9-21ksoftirqd/012:00:170
139391570,1ptp4l401ktimersoftd/309:52:323
220702560,7sleep23203499cyclictest09:05:012
139391520,1ptp4l401ktimersoftd/307:49:293
136922520,2sleep10-21swapper/111:00:131
57898490,2rtkit-daemon0-21swapper/011:35:300
3203499491,45cyclictest1797-21grep07:15:012
139391440,0ptp4l401ktimersoftd/307:40:263
32032994328,7cyclictest9-21ksoftirqd/010:50:240
3203499420,3cyclictest9921-21taskset08:37:452
139391420,0ptp4l401ktimersoftd/308:32:303
139391420,0ptp4l401ktimersoftd/307:35:183
3203599416,3cyclictest41-21ksoftirqd/311:20:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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