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2026-04-29 - 02:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackaslot8.osadl.org (updated Tue Apr 28, 2026 12:44:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
283572316290,17sleep20-21swapper/207:09:572
281442275246,19sleep00-21swapper/007:07:300
280772272210,19sleep10-21swapper/107:06:391
280792265233,21sleep30-21swapper/307:06:423
226812710,0sleep20-21swapper/212:06:312
245352660,0sleep10-21swapper/109:51:481
84802620,0sleep20-21swapper/212:37:192
108542600,0sleep10-21swapper/110:03:261
268682560,0sleep30-21swapper/312:29:153
52652550,0sleep10-21swapper/112:35:181
248422530,0sleep10-21swapper/112:27:411
196932520,0sleep30-21swapper/310:27:503
317142200,0sleep10-21swapper/112:12:081
313332190,0sleep00-21swapper/011:52:250
187692180,0sleep00-21swapper/009:48:480
183612180,0sleep10-21swapper/111:45:011
144022180,0sleep20-21swapper/210:25:022
314572150,0sleep10-21swapper/111:13:541
323642140,0sleep20-21swapper/211:14:342
177162140,0sleep30-21swapper/310:07:053
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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