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2026-01-14 - 05:37
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackaslot8.osadl.org (updated Wed Jan 14, 2026 00:44:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
297582288261,17sleep20-21swapper/219:08:482
278682270243,18sleep10-21swapper/119:05:051
296332269239,20sleep00-21swapper/019:07:130
295632259230,19sleep30-21swapper/319:06:203
86932670,0sleep30-21swapper/300:00:143
312322660,0sleep00-21swapper/019:10:150
3212600,0sleep2271rcuc/221:36:582
326752560,0sleep00-21swapper/021:17:260
122502560,0sleep20-21swapper/223:23:142
204802550,0sleep00-21swapper/021:10:130
163012550,0sleep10-21swapper/122:06:091
200142330,0sleep00-21swapper/019:55:230
212432170,0sleep00-21swapper/023:09:100
223682150,0sleep00-21swapper/023:29:440
29973991413,1cyclictest22-21ksoftirqd/123:55:011
2997399131,2cyclictest22-21ksoftirqd/122:50:011
2997399129,2cyclictest22-21ksoftirqd/122:00:021
2997399129,2cyclictest22-21ksoftirqd/121:30:001
29973991211,1cyclictest22-21ksoftirqd/100:30:001
158392120,0sleep012-21ksoftirqd/022:05:480
56812110,0sleep20-21swapper/222:20:122
2998299119,1cyclictest34-21ksoftirqd/300:00:003
2997399119,2cyclictest22-21ksoftirqd/121:20:001
29973991110,1cyclictest22-21ksoftirqd/123:20:001
29973991110,1cyclictest22-21ksoftirqd/100:00:011
2998299108,1cyclictest34-21ksoftirqd/323:40:003
2998299102,1cyclictest141rcu_preempt21:55:023
2997399109,1cyclictest22-21ksoftirqd/100:20:001
2997399109,1cyclictest22-21ksoftirqd/100:00:001
2997399108,2cyclictest22-21ksoftirqd/121:40:001
2997399108,1cyclictest22-21ksoftirqd/123:00:011
2997399107,2cyclictest22-21ksoftirqd/120:50:011
2997399107,2cyclictest22-21ksoftirqd/120:20:001
2996899101,6cyclictest14801-21turbostat21:00:000
110192100,0sleep00-21swapper/023:22:160
299829998,1cyclictest34-21ksoftirqd/323:00:003
299829997,2cyclictest34-21ksoftirqd/320:00:003
299829997,1cyclictest34-21ksoftirqd/320:15:003
299829992,5cyclictest141rcu_preempt23:30:273
299829990,8cyclictest28678-21sh22:34:123
299739998,1cyclictest22-21ksoftirqd/123:40:001
299739998,1cyclictest22-21ksoftirqd/122:05:021
299739998,1cyclictest18750irq/134-ahci[0022:20:011
299739997,1cyclictest22-21ksoftirqd/119:25:001
299739996,2cyclictest22-21ksoftirqd/100:10:001
23956290,0sleep20-21swapper/200:29:482
299829987,1cyclictest34-21ksoftirqd/322:40:013
299829987,1cyclictest34-21ksoftirqd/321:45:013
299829987,1cyclictest34-21ksoftirqd/300:20:013
299829987,1cyclictest34-21ksoftirqd/300:10:003
299829986,1cyclictest31163-21ssh21:35:423
299829984,1cyclictest34-21ksoftirqd/320:10:003
299829982,2cyclictest141rcu_preempt22:40:123
299829981,5cyclictest34-21ksoftirqd/320:20:113
299829981,2cyclictest34-21ksoftirqd/320:40:133
299739987,1cyclictest22-21ksoftirqd/122:40:011
299739987,1cyclictest22-21ksoftirqd/121:20:001
299739986,2cyclictest22-21ksoftirqd/121:35:001
299739986,1cyclictest22-21ksoftirqd/120:40:011
299739986,1cyclictest22-21ksoftirqd/119:15:021
299739985,2cyclictest22-21ksoftirqd/119:35:001
7998270,0sleep10-21swapper/123:40:141
299829976,1cyclictest34-21ksoftirqd/322:55:003
299829976,1cyclictest34-21ksoftirqd/322:10:013
299829976,1cyclictest34-21ksoftirqd/320:40:023
299829976,1cyclictest34-21ksoftirqd/320:20:003
299829976,1cyclictest34-21ksoftirqd/300:15:013
299829974,1cyclictest18003-21ssh21:28:153
299829973,3cyclictest658-21snmpd21:00:283
299829973,3cyclictest504-21dbus-daemon19:10:253
299829973,3cyclictest13622-11brltty21:05:143
299829972,3cyclictest34-21ksoftirqd/321:48:303
299829971,5cyclictest0-21swapper/323:50:113
299829971,4cyclictest141rcu_preempt21:30:463
299829971,4cyclictest0-21swapper/322:24:543
299829970,6cyclictest0-21swapper/321:52:263
299829970,4cyclictest13748-21cron19:45:013
299779973,3cyclictest658-21snmpd23:46:002
299779973,3cyclictest504-21dbus-daemon22:13:182
299779973,3cyclictest275-21systemd-journal20:37:432
299779971,3cyclictest30128-21idleruntime-cro22:55:002
299739976,1cyclictest22-21ksoftirqd/123:05:011
299739976,1cyclictest22-21ksoftirqd/121:15:001
299739976,1cyclictest22-21ksoftirqd/120:10:011
299739975,2cyclictest22-21ksoftirqd/122:15:011
299739974,2cyclictest22-21ksoftirqd/121:50:121
299739973,3cyclictest658-21snmpd23:13:111
299739973,3cyclictest658-21snmpd21:40:201
299739973,1cyclictest22-21ksoftirqd/121:46:021
299739972,4cyclictest658-21snmpd22:32:131
299739972,3cyclictest22-21ksoftirqd/120:55:191
299739972,2cyclictest22-21ksoftirqd/120:50:181
299739972,0cyclictest22-21ksoftirqd/100:10:591
299739971,4cyclictest211rcuc/123:30:171
299739971,2cyclictest141rcu_preempt00:37:511
299739971,1cyclictest141rcu_preempt22:20:161
299739970,5cyclictest22-21ksoftirqd/123:45:551
299739970,4cyclictest22-21ksoftirqd/120:25:011
299689975,1cyclictest12-21ksoftirqd/000:00:000
299689974,2cyclictest275-21systemd-journal00:27:390
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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