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2026-04-27 - 17:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot4.osadl.org (updated Mon Apr 27, 2026 12:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
34036782254187,23sleep10-21swapper/107:09:341
34035772237194,28sleep00-21swapper/007:08:290
357206021430,1sleep1251rcuc/111:45:151
35880852590,4sleep10-21swapper/112:05:241
35454032530,4sleep10-21swapper/111:10:041
34786712530,4sleep126-21ksoftirqd/109:42:581
179699520,3rtkit-daemon1795-21rtkit-daemon11:48:240
179699510,3rtkit-daemon1795-21rtkit-daemon10:51:531
179699500,4rtkit-daemon1795-21rtkit-daemon09:32:141
179699500,3rtkit-daemon1795-21rtkit-daemon11:05:241
179699490,3rtkit-daemon1795-21rtkit-daemon10:33:520
179699480,4rtkit-daemon1795-21rtkit-daemon08:00:591
179699480,3rtkit-daemon1795-21rtkit-daemon11:59:490
179699480,3rtkit-daemon1795-21rtkit-daemon11:22:570
179699480,3rtkit-daemon1795-21rtkit-daemon11:22:560
179699440,6rtkit-daemon1795-21rtkit-daemon11:15:211
179699420,5rtkit-daemon3452566-21diskmemload11:54:261
179699390,3rtkit-daemon0-21swapper/110:31:541
179699390,3rtkit-daemon0-21swapper/009:41:030
35993912380,3chrt0-21swapper/012:20:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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