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2025-12-02 - 20:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Tue Dec 02, 2025 00:46:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30732899406406,0cyclictest0-21swapper/823:27:4214
30732899406405,1cyclictest0-21swapper/822:50:2914
30732899406405,1cyclictest0-21swapper/819:26:1414
30735799327326,0cyclictest0-21swapper/1522:50:287
30735799327326,0cyclictest0-21swapper/1519:26:147
30735799326326,0cyclictest0-21swapper/1523:27:427
30734699325325,0cyclictest0-21swapper/1219:27:164
30734699325324,1cyclictest0-21swapper/1223:39:004
30734699325324,1cyclictest0-21swapper/1223:14:204
30734699324324,0cyclictest0-21swapper/1223:56:044
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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