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2025-11-18 - 02:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Tue Nov 18, 2025 00:46:02)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
68078099429423,6cyclictest1145333-21kworker/0:2+events22:52:350
68079199408406,1cyclictest0-21swapper/322:48:019
68078099400391,8cyclictest0-21swapper/022:48:000
68078599394390,2cyclictest0-21swapper/122:48:011
68081599341337,2cyclictest1349505-21kworker/u64:3+events_unbound22:48:012
68078899336332,2cyclictest0-21swapper/222:48:018
68080899333333,0cyclictest0-21swapper/822:52:3514
68080599322318,2cyclictest1257164-21kworker/u64:6+flush-9:122:48:0113
68081299316311,3cyclictest1110615-21kworker/9:1+events22:48:0015
68082899308308,0cyclictest0-21swapper/1422:52:356
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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