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2025-09-17 - 08:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Wed Sep 17, 2025 00:46:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9625429945016,28cyclictest0-21swapper/023:56:560
9625749944613,27cyclictest0-21swapper/923:49:3715
96256499429426,2cyclictest1305843-21kworker/u64:1+events_unbound23:53:2312
9625539942117,403cyclictest0-21swapper/300:26:519
96255099421419,2cyclictest0-21swapper/200:04:598
9625429942014,404cyclictest0-21swapper/000:17:430
962545994147,407cyclictest0-21swapper/100:01:411
962560994114,403cyclictest0-21swapper/500:02:5211
962553994106,404cyclictest0-21swapper/319:16:599
962560994095,402cyclictest0-21swapper/519:16:4511
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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