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2025-12-15 - 11:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Mon Dec 15, 2025 00:46:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
309039994210,420cyclictest0-21swapper/420:44:1310
309039994210,420cyclictest0-21swapper/420:34:3210
309039994200,419cyclictest0-21swapper/420:50:0410
309039994200,419cyclictest0-21swapper/420:48:3410
309039994200,419cyclictest0-21swapper/420:48:3410
309039994200,419cyclictest0-21swapper/420:36:5310
309039994200,419cyclictest0-21swapper/420:36:5310
30904999394393,0cyclictest0-21swapper/1420:39:586
30904999394393,0cyclictest0-21swapper/1420:39:586
30904999388386,0cyclictest0-21swapper/1420:47:346
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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