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2025-12-10 - 06:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Wed Dec 10, 2025 00:45:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3707320994361,28cyclictest0-21swapper/919:25:4715
370729999425424,1cyclictest3751649-21kworker/3:1+i915-unordered19:16:239
37073049942213,405cyclictest0-21swapper/419:17:2310
37073049942114,404cyclictest0-21swapper/420:08:5110
370731899416416,0cyclictest0-21swapper/823:20:4314
370731899415415,0cyclictest0-21swapper/800:00:2614
3707333994149,403cyclictest0-21swapper/1319:24:505
3707299994090,408cyclictest3834994-21Isolated09:53:589
3707299994090,408cyclictest3834994-21Isolated09:53:589
370728999409402,6cyclictest3686213-21kworker/1:2+events19:25:481
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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