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2026-01-09 - 02:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Mon Jan 05, 2026 00:46:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31751669945122,27cyclictest0-21swapper/200:13:588
3175164994453,27cyclictest0-21swapper/022:26:230
3175165994394,28cyclictest0-21swapper/123:16:211
3175165994362,27cyclictest0-21swapper/122:21:221
3175165994353,27cyclictest0-21swapper/122:27:551
31751649943015,27cyclictest4185196-21dd23:16:360
3175178994270,427cyclictest0-21swapper/1400:17:266
3175178994270,426cyclictest0-21swapper/1422:17:206
3175178994260,426cyclictest0-21swapper/1422:26:526
3175178994260,426cyclictest0-21swapper/1422:13:426
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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