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2025-06-29 - 00:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Sat Jun 28, 2025 00:46:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
17188589948323,55cyclictest0-21swapper/023:30:230
17188589947315,56cyclictest556744-21IPC0
17188679946024,21cyclictest0-21swapper/900:12:4715
17188679945723,27cyclictest0-21swapper/920:50:3915
17188639945518,431cyclictest11092-21seamonkey22:34:2711
17188679944817,28cyclictest0-21swapper/922:53:2115
17188629944319,424cyclictest0-21swapper/422:02:5910
1718862994387,27cyclictest0-21swapper/422:18:1810
17188609943611,28cyclictest0-21swapper/223:45:458
1718862994340,28cyclictest10629-21IPC10
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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