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2025-11-19 - 18:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot7.osadl.org (updated Wed Nov 19, 2025 00:45:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
94288599424417,3cyclictest0-21swapper/421:55:0610
94288599402402,0cyclictest0-21swapper/419:23:5110
94288599402402,0cyclictest0-21swapper/400:16:3110
94288599402401,1cyclictest0-21swapper/421:40:5410
94288599402401,1cyclictest0-21swapper/400:23:3910
94288599401401,0cyclictest0-21swapper/422:00:1810
94288599401401,0cyclictest0-21swapper/419:30:3210
94288399361361,0cyclictest0-21swapper/221:43:018
94289299353342,7cyclictest0-21swapper/1121:55:063
94290399351345,2cyclictest0-21swapper/1421:55:066
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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