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2026-01-19 - 16:52
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot7.osadl.org (updated Mon Jan 05, 2026 00:46:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31751669945122,27cyclictest0-21swapper/200:13:588
3175164994453,27cyclictest0-21swapper/022:26:230
3175165994394,28cyclictest0-21swapper/123:16:211
3175165994362,27cyclictest0-21swapper/122:21:221
3175165994353,27cyclictest0-21swapper/122:27:551
31751649943015,27cyclictest4185196-21dd23:16:360
3175178994270,427cyclictest0-21swapper/1400:17:266
3175178994270,426cyclictest0-21swapper/1422:17:206
3175178994260,426cyclictest0-21swapper/1422:26:526
3175178994260,426cyclictest0-21swapper/1422:13:426
3175178994260,426cyclictest0-21swapper/1400:38:216
3175165994265,416cyclictest0-21swapper/122:01:461
3175165994265,416cyclictest0-21swapper/122:01:461
31751659942421,403cyclictest0-21swapper/119:15:381
31751659942421,403cyclictest0-21swapper/119:15:381
31751739941816,0cyclictest0-21swapper/922:10:5915
3175164994176,404cyclictest0-21swapper/022:21:500
3175164994176,404cyclictest0-21swapper/022:00:450
3175164994176,404cyclictest0-21swapper/022:00:450
31751729941212,398cyclictest0-21swapper/821:59:2214
3175178994100,409cyclictest0-21swapper/1422:07:306
3175165994105,405cyclictest0-21swapper/122:15:431
3175177994094,404cyclictest0-21swapper/1322:14:205
3175167994083,404cyclictest0-21swapper/322:18:249
317516699407407,0cyclictest0-21swapper/222:08:598
3175174994060,403cyclictest0-21swapper/1000:19:512
317517799402402,0cyclictest0-21swapper/1300:38:445
3175173994020,402cyclictest0-21swapper/919:17:5815
3175173994020,402cyclictest0-21swapper/919:17:5815
317517499398396,2cyclictest4969-21gnome-shell00:13:582
3175179993970,396cyclictest3195501-21turbostat19:19:547
3175179993970,396cyclictest3195501-21turbostat19:19:547
317517499396395,1cyclictest0-21swapper/1022:16:212
317516799393390,3cyclictest3617494-21Renderer19:19:409
317516799393390,3cyclictest3617494-21Renderer19:19:399
317517799389385,3cyclictest3617494-21Renderer22:03:455
317517799389385,3cyclictest3617494-21Renderer22:03:455
317517799387386,1cyclictest0-21swapper/1300:15:475
317517099382381,1cyclictest29250irq/128-xhci_hcd22:18:2512
317517599379376,3cyclictest3617494-21Renderer22:18:243
317516699377374,2cyclictest3617494-21Renderer19:20:418
317516599376373,3cyclictest4969-21gnome-shell00:38:581
317516999375373,2cyclictest3617494-21Renderer22:14:2011
317517399371368,2cyclictest2908831-21kworker/9:0+events22:01:4615
317517399371368,2cyclictest2908831-21kworker/9:0+events22:01:4615
317516999369367,2cyclictest297285-21kworker/u64:1+events_unbound00:38:4411
317517699368366,2cyclictest4969-21gnome-shell19:18:594
317517699368366,2cyclictest4969-21gnome-shell19:18:594
317517699367367,0cyclictest0-21swapper/1200:39:444
317517099367366,1cyclictest3195552-21kworker/6:1+events22:20:2112
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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