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2025-06-29 - 00:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot8.osadl.org (updated Sat Jun 28, 2025 12:46:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
602588994701,459cyclictest895272-21meminfo12:30:2210
602586991400,139cyclictest871574-21meminfo12:05:248
602589991290,128cyclictest875989-21meminfo12:10:2211
602587991130,112cyclictest871575-21meminfo12:05:259
602587991120,111cyclictest691338-21meminfo08:45:239
602587991120,111cyclictest691338-21meminfo08:45:239
6025869910014,85cyclictest899724-21meminfo12:35:238
602594998823,61cyclictest0-21swapper/812:29:5414
60258599790,79cyclictest835412-21meminfo11:25:251
60259799760,75cyclictest678342-21meminfo08:30:232
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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