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2025-10-23 - 17:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot8.osadl.org (updated Thu Oct 23, 2025 12:45:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
197219099436425,6cyclictest1988298-21kworker/0:1+events11:43:450
197220899428427,0cyclictest0-21swapper/1511:43:307
197220399419416,2cyclictest564-21usb-storage11:43:303
197219099419414,4cyclictest1988298-21kworker/0:1+pm07:55:260
197220399415413,1cyclictest0-21swapper/1111:55:293
197219899406400,5cyclictest5394-21Xorg09:27:4213
1972208994000,399cyclictest0-21swapper/1511:55:307
197220099394389,3cyclictest1971316-21kworker/u64:2+events_unbound09:22:3815
197220099393392,1cyclictest0-21swapper/909:26:3115
197220099392389,2cyclictest2142480-21kworker/u64:1+events_unbound10:11:0415
197220399385380,4cyclictest5394-21Xorg11:52:533
197220899384383,0cyclictest0-21swapper/1509:45:037
197220899384382,1cyclictest0-21swapper/1510:56:077
197220899384382,1cyclictest0-21swapper/1510:56:077
197220899383381,1cyclictest0-21swapper/1510:19:257
197220899382381,0cyclictest0-21swapper/1511:51:417
197220899382380,1cyclictest0-21swapper/1512:07:157
197220899380379,0cyclictest0-21swapper/1509:20:277
197220899380378,1cyclictest0-21swapper/1510:26:457
197220899380378,1cyclictest0-21swapper/1509:42:587
197220899379378,0cyclictest0-21swapper/1511:04:307
197220899379378,0cyclictest0-21swapper/1510:11:037
197220899378377,0cyclictest0-21swapper/1509:29:077
197220399376376,0cyclictest0-21swapper/1109:20:283
197220399376375,1cyclictest0-21swapper/1110:26:453
197220399376375,1cyclictest0-21swapper/1109:42:573
197220899375373,1cyclictest0-21swapper/1509:51:217
197219099374371,2cyclictest0-21swapper/009:45:040
197219099374370,3cyclictest2170715-21kworker/u64:3+events_unbound10:56:070
197219099374370,3cyclictest2170715-21kworker/u64:3+events_unbound10:56:060
197219099373368,3cyclictest2212410-21kworker/u64:3+events_unbound12:07:140
197220699372369,2cyclictest2039776-21kworker/u64:0+events_unbound09:23:425
197219099372369,2cyclictest0-21swapper/011:51:420
197219099372369,2cyclictest0-21swapper/010:19:240
197219099370367,2cyclictest0-21swapper/009:20:280
197219599369364,1cyclictest56450usb-storage10:30:0910
197219099369367,2cyclictest0-21swapper/011:57:550
197219099369365,3cyclictest0-21swapper/009:42:580
197219099368366,2cyclictest0-21swapper/011:04:310
197219099368365,2cyclictest0-21swapper/010:25:420
197219099368365,2cyclictest0-21swapper/009:29:060
197219099367365,2cyclictest0-21swapper/010:11:040
197219599365361,1cyclictest71150usb-storage09:26:3010
197219399363359,3cyclictest2103536-21kworker/u64:5+events_unbound10:30:098
197219099363361,2cyclictest0-21swapper/009:51:200
197219599361360,1cyclictest0-21swapper/409:45:0410
197219999359357,2cyclictest0-21swapper/811:43:4614
197219799358356,1cyclictest2160960-21kworker/u64:2+events_unbound11:43:4612
197219399356355,1cyclictest0-21swapper/210:19:258
197219399348348,0cyclictest0-21swapper/209:27:158
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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