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2026-02-08 - 02:12
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack0slot8.osadl.org (updated Sat Feb 07, 2026 12:45:14)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
818333996792,671cyclictest947796-21meminfo09:15:090
818341994971,492cyclictest860877-21meminfo07:50:0814
818334994720,468cyclictest891520-21meminfo08:20:101
818338994700,467cyclictest825419-21meminfo07:15:1211
818343994540,452cyclictest907202-21meminfo08:35:092
818335994390,436cyclictest860880-21meminfo07:50:098
818349994381,436cyclictest0-21swapper/1510:53:117
81833999428425,2cyclictest854632-21kworker/u64:6+events_unbound08:36:4212
81833999428425,2cyclictest1004547-21kworker/u64:3+events_unbound10:13:1112
818345994270,1cyclictest246031-21chrome07:56:023
81834799425420,2cyclictest0-21swapper/1308:58:245
81834399425424,1cyclictest0-21swapper/1010:53:102
81833699425423,1cyclictest3008780-21Isolated18:12:149
818334994250,424cyclictest0-21swapper/107:50:161
81834799424422,1cyclictest27750irq/126-ahci[0000:00:17.0]08:44:425
81834999420419,0cyclictest0-21swapper/1508:38:347
81833499420419,1cyclictest0-21swapper/108:16:471
81833499419417,1cyclictest0-21swapper/111:47:361
81833499418418,0cyclictest0-21swapper/111:25:331
81833499418417,0cyclictest0-21swapper/112:00:121
81833499418414,3cyclictest838913-21kworker/u64:2+events_unbound08:30:011
81833699416411,4cyclictest978220-21kworker/u64:5+events_unbound10:23:519
81833499416416,0cyclictest0-21swapper/107:39:281
81833699415415,0cyclictest0-21swapper/311:52:529
81834999414410,1cyclictest0-21swapper/1508:58:257
81833699414410,3cyclictest1017792-21kworker/u64:0+events_unbound10:36:379
81833499414414,0cyclictest0-21swapper/111:04:511
81833699413407,4cyclictest849210-21kworker/u64:1+events_unbound07:56:019
81833699412409,2cyclictest915534-21kworker/u64:1+events_unbound09:01:059
81834799411408,2cyclictest4083286-21Socket18:12:145
81834199411407,3cyclictest2429298-21MediaTimer14
81834999410409,0cyclictest0-21swapper/1507:39:307
81834799409407,1cyclictest27750irq/126-ahci[0000:00:17.0]08:30:025
81834799409407,1cyclictest0-21swapper/1308:08:155
81834799409406,2cyclictest1024181-21kworker/u64:3+events_unbound10:37:395
81834799409404,4cyclictest1103834-21kworker/u64:7+events_unbound11:59:095
81834999408406,1cyclictest0-21swapper/1509:03:437
81834999408406,1cyclictest0-21swapper/1507:49:147
81834999407406,0cyclictest0-21swapper/1511:40:167
81834999407406,0cyclictest0-21swapper/1511:06:477
81834999407405,1cyclictest0-21swapper/1512:16:557
81834799407405,1cyclictest0-21swapper/1310:33:305
81834999406405,0cyclictest0-21swapper/1509:05:447
81834999406405,0cyclictest0-21swapper/1507:12:477
81834999406402,2cyclictest0-21swapper/1511:23:287
81834999405404,0cyclictest0-21swapper/1512:09:597
81834999405404,0cyclictest0-21swapper/1511:35:017
81834999405404,0cyclictest0-21swapper/1510:56:227
81834999402401,0cyclictest0-21swapper/1511:52:517
81834999402401,0cyclictest0-21swapper/1507:30:507
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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