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2025-11-04 - 21:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot8.osadl.org (updated Tue Nov 04, 2025 12:45:15)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
312761991080,106cyclictest336432-21meminfo07:30:2011
312758991010,99cyclictest450080-21meminfo09:25:258
31276499970,95cyclictest370912-21meminfo08:05:2314
31277199960,94cyclictest499041-21meminfo10:15:215
31275899960,93cyclictest361089-21meminfo07:55:188
31277199910,89cyclictest474224-21meminfo09:50:235
31276899880,87cyclictest420471-21meminfo08:55:213
31276199880,87cyclictest425503-21meminfo09:00:2111
31275999880,87cyclictest494281-21meminfo10:10:229
31276899870,86cyclictest608115-21meminfo12:05:223
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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