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2025-05-11 - 14:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack0slot8.osadl.org (updated Sun May 11, 2025 12:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1390271993900,388cyclictest1664147-21meminfo11:55:248
1390272991720,171cyclictest1682743-21meminfo12:15:239
1390272991720,171cyclictest1682743-21meminfo12:15:239
1390284991221,120cyclictest1687335-21meminfo12:20:235
1390280991090,107cyclictest1459683-21meminfo08:20:2515
139027999990,98cyclictest1630285-21meminfo11:20:2514
139028099860,85cyclictest1498039-21meminfo09:00:2515
139027199860,85cyclictest1658846-21meminfo11:50:288
139028099850,84cyclictest1578382-21meminfo10:25:2715
139028199840,83cyclictest1568502-21meminfo10:15:252
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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