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2025-05-09 - 05:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot3.osadl.org (updated Fri May 09, 2025 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
94146799151,12cyclictest0-21swapper/321:00:133
94146799150,3cyclictest0-21swapper/319:55:123
94146799149,0cyclictest0-21swapper/320:55:013
941467991411,1cyclictest0-21swapper/321:15:133
94146799140,11cyclictest0-21swapper/322:25:143
94146799130,12cyclictest0-21swapper/323:10:123
94146799130,11cyclictest0-21swapper/319:30:133
941467991210,1cyclictest0-21swapper/322:30:123
941467991210,1cyclictest0-21swapper/320:00:113
94146799120,11cyclictest0-21swapper/321:50:023
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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