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2025-07-19 - 05:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot3.osadl.org (updated Sat Jul 19, 2025 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
308640799146,6cyclictest0-21swapper/322:15:123
3086407991413,0cyclictest0-21swapper/321:31:333
3086407991413,0cyclictest0-21swapper/321:21:173
3086407991313,0cyclictest0-21swapper/322:54:293
3086407991313,0cyclictest0-21swapper/319:48:063
3086407991312,0cyclictest0-21swapper/323:46:423
3086407991312,0cyclictest0-21swapper/323:23:093
3086407991312,0cyclictest0-21swapper/322:11:293
3086407991312,0cyclictest0-21swapper/321:25:243
3086407991312,0cyclictest0-21swapper/320:11:393
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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