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2025-07-12 - 11:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot3.osadl.org (updated Sat Jul 12, 2025 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2524053991413,0cyclictest0-21swapper/323:00:233
2524053991413,0cyclictest0-21swapper/320:23:423
2524053991413,0cyclictest0-21swapper/300:20:153
2524053991313,0cyclictest0-21swapper/322:36:493
2524053991313,0cyclictest0-21swapper/321:54:503
2524053991313,0cyclictest0-21swapper/321:47:393
2524053991313,0cyclictest0-21swapper/300:25:213
2524053991312,0cyclictest0-21swapper/323:42:223
2524053991312,0cyclictest0-21swapper/323:35:113
2524053991312,0cyclictest0-21swapper/323:22:533
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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