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2024-04-27 - 06:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack1slot3.osadl.org (updated Sat Apr 27, 2024 00:43:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2800680991411,1cyclictest0-21swapper/322:30:123
2800680991210,1cyclictest0-21swapper/300:15:103
280068099120,11cyclictest0-21swapper/323:50:103
280068099120,11cyclictest0-21swapper/320:15:173
280068099120,0cyclictest0-21swapper/321:45:133
280068099119,1cyclictest0-21swapper/323:30:103
280068099110,11cyclictest0-21swapper/322:15:183
280068099110,11cyclictest0-21swapper/321:40:123
280068099110,0cyclictest0-21swapper/323:25:133
280068099110,0cyclictest0-21swapper/321:50:133
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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