You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-27 - 14:59
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack1slot3.osadl.org (updated Sat Jun 27, 2026 12:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
218260999158,6cyclictest0-21swapper/307:55:133
2182609991413,0cyclictest0-21swapper/310:22:453
2182609991413,0cyclictest0-21swapper/308:16:483
2182609991413,0cyclictest0-21swapper/307:37:533
2182609991413,0cyclictest0-21swapper/307:26:373
2182609991412,1cyclictest0-21swapper/312:29:443
2182609991313,0cyclictest0-21swapper/312:19:293
2182609991313,0cyclictest0-21swapper/311:31:213
2182609991313,0cyclictest0-21swapper/310:46:183
2182609991313,0cyclictest0-21swapper/310:36:033
2182609991313,0cyclictest0-21swapper/308:53:393
2182609991313,0cyclictest0-21swapper/307:48:063
2182609991312,0cyclictest0-21swapper/312:04:083
2182609991312,0cyclictest0-21swapper/310:25:493
2182609991212,0cyclictest0-21swapper/312:35:523
2182609991212,0cyclictest0-21swapper/312:30:453
2182609991212,0cyclictest0-21swapper/312:14:223
2182609991212,0cyclictest0-21swapper/311:23:103
2182609991212,0cyclictest0-21swapper/311:07:483
2182609991212,0cyclictest0-21swapper/309:51:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional