You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-09-16 - 06:20
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack1slot3.osadl.org (updated Tue Sep 16, 2025 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
217714999130,1cyclictest0-21swapper/322:35:153
217714999130,11cyclictest0-21swapper/320:20:123
2177149991211,0cyclictest0-21swapper/321:55:173
217714999120,1cyclictest0-21swapper/322:50:013
217714999120,11cyclictest0-21swapper/321:05:013
217714999120,11cyclictest0-21swapper/320:45:143
217714999111,9cyclictest69450irq/121-eno123:00:163
2177149991111,0cyclictest69450irq/121-eno123:05:143
2177149991111,0cyclictest69450irq/121-eno119:45:013
2177149991111,0cyclictest0-21swapper/321:40:143
2177149991110,0cyclictest0-21swapper/323:35:133
2177149991110,0cyclictest0-21swapper/322:50:023
2177149991110,0cyclictest0-21swapper/321:25:133
2177149991110,0cyclictest0-21swapper/319:30:133
217714999110,11cyclictest0-21swapper/321:10:133
217714999110,10cyclictest69450irq/121-eno123:40:223
217714999110,10cyclictest69450irq/121-eno122:03:223
217714999110,10cyclictest0-21swapper/323:20:133
217714999110,10cyclictest0-21swapper/319:50:013
217714999110,10cyclictest0-21swapper/319:25:143
217714999110,10cyclictest0-21swapper/300:25:023
217714999110,0cyclictest0-21swapper/320:05:013
217714999110,0cyclictest0-21swapper/320:05:003
217714999109,1cyclictest69450irq/121-eno123:55:193
217714999109,1cyclictest69450irq/121-eno122:10:123
217714999109,1cyclictest0-21swapper/320:10:153
217714999108,2cyclictest69450irq/121-eno123:25:143
217714999108,1cyclictest0-21swapper/323:50:123
217714999108,0cyclictest0-21swapper/320:05:023
2177149991010,0cyclictest69450irq/121-eno122:25:533
2177149991010,0cyclictest69450irq/121-eno122:15:223
2177149991010,0cyclictest69450irq/121-eno122:08:173
2177149991010,0cyclictest69450irq/121-eno121:35:193
2177149991010,0cyclictest69450irq/121-eno120:50:173
2177149991010,0cyclictest69450irq/121-eno119:15:013
2177149991010,0cyclictest0-21swapper/323:45:123
2177149991010,0cyclictest0-21swapper/300:10:223
217714999100,9cyclictest69450irq/121-eno122:40:573
217714999100,9cyclictest69450irq/121-eno122:20:163
217714999100,8cyclictest69450irq/121-eno121:32:113
217714999100,0cyclictest0-21swapper/322:30:203
217714999100,0cyclictest0-21swapper/320:15:133
217714999100,0cyclictest0-21swapper/300:15:193
21771499999,0cyclictest69450irq/121-eno123:30:253
21771499999,0cyclictest69450irq/121-eno123:15:183
21771499999,0cyclictest69450irq/121-eno122:55:193
21771499999,0cyclictest69450irq/121-eno121:50:183
21771499999,0cyclictest69450irq/121-eno120:25:143
21771499999,0cyclictest69450irq/121-eno119:20:173
21771499999,0cyclictest0-21swapper/319:55:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional