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2026-06-16 - 06:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack1slot3.osadl.org (updated Tue Jun 16, 2026 00:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5848099120,11cyclictest0-21swapper/323:45:003
5848099120,11cyclictest0-21swapper/322:20:013
5848099120,11cyclictest0-21swapper/321:40:193
5848099120,11cyclictest0-21swapper/321:20:113
5848099120,11cyclictest0-21swapper/320:45:003
5848099120,11cyclictest0-21swapper/320:00:003
5848099120,11cyclictest0-21swapper/300:05:143
5848099120,11cyclictest0-21swapper/300:00:003
5848099120,0cyclictest0-21swapper/321:00:113
58480991111,0cyclictest0-21swapper/319:20:173
58480991110,0cyclictest0-21swapper/321:15:123
5848099110,10cyclictest0-21swapper/321:25:123
5848099110,10cyclictest0-21swapper/320:55:133
5848099110,10cyclictest0-21swapper/300:10:193
5848099110,0cyclictest0-21swapper/323:30:143
5848099109,0cyclictest0-21swapper/320:05:143
5848099108,1cyclictest0-21swapper/322:30:123
58480991010,0cyclictest0-21swapper/322:20:143
58480991010,0cyclictest0-21swapper/321:05:123
58480991010,0cyclictest0-21swapper/319:50:133
5848099100,9cyclictest0-21swapper/322:55:193
5848099100,9cyclictest0-21swapper/300:32:203
5848099100,9cyclictest0-21swapper/300:24:263
5848099100,0cyclictest0-21swapper/323:15:123
584809999,0cyclictest0-21swapper/323:05:203
584809999,0cyclictest0-21swapper/323:00:123
584809999,0cyclictest0-21swapper/321:35:143
584809999,0cyclictest0-21swapper/320:35:213
584809999,0cyclictest0-21swapper/300:30:013
584809998,0cyclictest0-21swapper/322:40:143
584809998,0cyclictest0-21swapper/322:40:143
584809990,9cyclictest0-21swapper/323:25:193
584809990,8cyclictest0-21swapper/323:50:013
584809990,0cyclictest0-21swapper/319:45:123
56763291,5sleep30-21swapper/319:05:133
584809988,0cyclictest0-21swapper/322:37:193
584809988,0cyclictest0-21swapper/321:55:163
584809988,0cyclictest0-21swapper/321:10:173
584809988,0cyclictest0-21swapper/320:45:103
584809988,0cyclictest0-21swapper/320:15:163
584809987,1cyclictest0-21swapper/320:10:133
584809987,0cyclictest0-21swapper/322:10:593
584809980,7cyclictest0-21swapper/319:30:103
584809977,0cyclictest0-21swapper/323:35:123
584809977,0cyclictest0-21swapper/322:50:183
584809977,0cyclictest0-21swapper/322:05:143
584809977,0cyclictest0-21swapper/322:00:123
584809977,0cyclictest0-21swapper/320:00:173
584809977,0cyclictest0-21swapper/300:35:143
584809976,0cyclictest0-21swapper/320:25:203
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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