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2026-03-07 - 00:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Fri Mar 06, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
114712980,0sleep411469-21systemd-cgroups10:23:554
306162910,1sleep330617-21grep10:02:483
53142810,0sleep233-21ksoftirqd/209:42:522
262752780,0sleep20-21swapper/209:27:312
317252770,2sleep73114399cyclictest11:39:187
141192710,0sleep70-21swapper/709:39:457
302522530,0sleep00-21swapper/010:08:210
3067925125,9sleep40-21swapper/407:02:564
277452510,2sleep73114399cyclictest10:08:127
80322500,1sleep6686-21dbus-daemon12:00:166
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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