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2026-05-16 - 16:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Sat May 16, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
208442990,0sleep1231rcuc/112:02:051
225362800,2sleep52064799cyclictest09:49:055
208142760,2sleep32063399cyclictest11:30:593
94172590,0sleep10-21swapper/111:38:101
94932570,0sleep20-21swapper/210:13:052
224562570,1sleep3758-21runrttasks11:21:223
277472540,0sleep20-21swapper/209:11:222
14852530,0sleep20-21swapper/210:21:542
84272510,1sleep78398-21sshd11:47:537
2045925127,8sleep10-21swapper/107:08:231
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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