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2026-07-25 - 19:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Sat Jul 25, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27091997535,40cyclictest0-21swapper/110:33:531
27096996933,36cyclictest0-21swapper/610:33:546
219722540,0sleep40-21swapper/409:50:054
128672520,1sleep612866-21grep12:07:116
217262510,1sleep09-21ksoftirqd/010:37:020
2674325046,1sleep00-21swapper/007:04:100
2675524825,8sleep30-21swapper/307:04:213
72022470,0sleep30-21swapper/311:37:523
69062470,0sleep20-21swapper/210:25:272
231252470,0sleep70-21swapper/710:10:027
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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