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2026-04-23 - 20:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Thu Apr 23, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
244892700,1sleep31796999cyclictest09:47:403
133672540,2sleep31796999cyclictest12:24:543
319492510,0sleep00-21swapper/011:41:180
232462510,1sleep09-21ksoftirqd/010:06:110
26302490,0sleep10-21swapper/109:12:541
42132480,0sleep70-21swapper/710:51:277
162502480,0sleep116240-21sshd10:16:531
77832470,1sleep233-21ksoftirqd/211:12:052
1780624725,8sleep10-21swapper/107:09:481
168352470,2sleep585250irq/26-em1-tx-010:54:065
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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