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2026-05-06 - 18:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Wed May 06, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4679916410,61cyclictest464-21systemd-journal12:03:194
322742970,2sleep749899cyclictest11:32:447
104502890,0sleep7721ktimersoftd/711:23:477
35272750,0sleep10-21swapper/109:36:331
486996845,23cyclictest0-21swapper/612:03:196
322102680,1sleep60-21swapper/607:04:476
478996766,1cyclictest15-21kswork12:03:195
204322520,11sleep685150irq/25-em1-rx-012:20:176
317232510,0sleep30-21swapper/311:57:393
317232510,0sleep30-21swapper/311:57:393
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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