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2026-06-01 - 22:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Mon Jun 01, 2026 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
252812770,2sleep22923599cyclictest11:17:012
20552710,0sleep20-21swapper/210:03:012
116162690,0sleep00-21swapper/009:13:250
305472570,0sleep530544-21sshd11:17:205
2903925725,18sleep50-21swapper/507:07:595
83582510,0sleep60-21swapper/609:20:366
83582510,0sleep60-21swapper/609:20:366
314642480,0sleep40-21swapper/411:15:274
199462480,0sleep50-21swapper/512:01:495
98192470,1sleep69820-21kworker/u16:412:29:226
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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