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2026-04-02 - 03:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Thu Apr 02, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
303419912112,36cyclictest0-21swapper/523:15:055
303419911734,64cyclictest24533-21systemd23:55:155
241602870,0sleep20-21swapper/223:21:292
30339998482,1cyclictest1116-21nfsd23:15:053
296412790,0sleep00-21swapper/021:32:260
3033999740,73cyclictest29711-21kworker/3:323:55:143
3034399530,52cyclictest31877-21kworker/u16:323:15:067
283372530,0sleep40-21swapper/423:36:364
28652520,0sleep60-21swapper/621:27:126
304472510,0sleep00-21swapper/000:31:110
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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