You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-10-17 - 19:14
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Fri Oct 17, 2025 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
226042760,1sleep01-21systemd09:37:180
282182500,0sleep51521199cyclictest10:18:085
286862490,0sleep60-21swapper/610:27:386
1454424828,15sleep30-21swapper/306:50:583
284832460,0sleep60-21swapper/609:47:346
24172460,0sleep02418-21systemd-cgroups10:28:120
200812460,0sleep10-21swapper/111:05:051
1483824624,8sleep40-21swapper/406:52:194
183082450,0sleep10-21swapper/109:59:141
100432450,0sleep10-21swapper/109:45:441
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional