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2026-04-03 - 10:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Fri Apr 03, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
581121100,0sleep61-21systemd21:14:456
82112840,2sleep52530699cyclictest00:32:355
151992820,0sleep30-21swapper/322:47:093
26882690,0sleep50-21swapper/522:53:595
123212660,0sleep20-21swapper/200:15:582
123212660,0sleep20-21swapper/200:15:582
124822520,0sleep20-21swapper/222:13:122
94262510,0sleep40-21swapper/422:03:374
278682500,0sleep50-21swapper/523:35:005
10022500,3sleep72532299cyclictest23:37:107
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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