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2025-05-09 - 05:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Fri May 09, 2025 00:43:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
16376997574,1cyclictest28105-21nfsd21:23:025
88942730,0sleep70-21swapper/723:06:497
219972490,0sleep10-21swapper/121:07:501
62392470,1sleep46241-21id22:52:214
298192470,0sleep50-21swapper/522:25:475
209742470,0sleep40-21swapper/400:12:304
96252460,0sleep00-21swapper/022:44:080
96252460,0sleep00-21swapper/022:44:080
126042460,0sleep70-21swapper/722:44:237
126042460,0sleep70-21swapper/722:44:237
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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