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2026-07-01 - 10:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Wed Jul 01, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
21373999934,12cyclictest2421-21sshd21:23:347
120302900,2sleep32134499cyclictest23:42:313
22132880,3sleep4481ktimersoftd/422:11:344
223462800,2sleep52135999cyclictest21:30:345
264552790,1sleep626453-21sshd00:35:526
264552790,1sleep626453-21sshd00:35:526
175872710,1sleep4471rcuc/422:24:074
315632680,0sleep00-21swapper/021:50:070
178462620,0sleep10-21swapper/122:37:261
2132499610,61cyclictest5318-21kworker/1:521:23:331
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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