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2026-04-25 - 09:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Sat Apr 25, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
314992760,1sleep731483-21sshd23:38:397
314992760,1sleep731483-21sshd23:38:397
204312580,0sleep30-21swapper/322:06:163
213022530,0sleep70-21swapper/722:23:107
43132510,1sleep64311-21bash21:20:386
239162510,1sleep5561ktimersoftd/521:29:185
1563025025,9sleep30-21swapper/319:05:273
245212480,0sleep40-21swapper/423:06:164
133042480,1sleep1721-21dbus-daemon23:46:581
71442460,0sleep50-21swapper/522:39:105
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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