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2026-07-10 - 15:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Fri Jul 10, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28761991475,83cyclictest21933-21systemd09:30:024
287619914536,83cyclictest11758-21sshd12:08:284
262692990,10sleep30-21swapper/307:02:133
121502970,0sleep10-21swapper/111:57:471
28753998785,2cyclictest1844-21nfsd09:30:013
169972850,2sleep52876899cyclictest10:00:095
28774997919,23cyclictest21931-21sshd09:30:026
194682750,0sleep50-21swapper/512:21:295
28774997134,0cyclictest0-21swapper/612:08:286
187802700,2sleep02872699cyclictest12:30:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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