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2026-04-27 - 23:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Mon Apr 27, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
955099144143,1cyclictest9-21ksoftirqd/010:26:370
955099141109,17cyclictest9-21ksoftirqd/012:26:480
95509913322,57cyclictest24118-21sshd10:33:190
9555998785,1cyclictest670-21rs:main1
955699851,83cyclictest12195-21kworker/2:510:26:362
77382810,2sleep6957499cyclictest10:41:456
9574997459,15cyclictest0-21swapper/612:26:496
956899748,24cyclictest0-21swapper/510:26:375
87362730,0sleep40-21swapper/410:55:284
16532700,0sleep60-21swapper/610:24:156
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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