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2026-05-02 - 02:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Sat May 02, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2669099119118,1cyclictest41-21ksoftirqd/321:23:553
2668599920,91cyclictest2932-21kworker/2:221:23:542
106962810,0sleep00-21swapper/022:40:020
26670998031,49cyclictest0-21swapper/021:23:540
199302790,0sleep60-21swapper/623:11:156
161962790,2sleep62670799cyclictest21:37:296
115412720,1sleep51-21systemd22:32:225
26707997113,23cyclictest0-21swapper/621:23:556
2670399710,70cyclictest24620-21kworker/u16:521:23:555
192032700,1sleep319201-21sshd00:30:503
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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