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2026-09-22 - 21:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Tue Sep 22, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
885621000,2sleep53101299cyclictest10:29:515
2275221000,1sleep73102499cyclictest10:13:277
59242710,0sleep60-21swapper/609:39:476
95302700,1sleep23099499cyclictest12:33:312
2920126455,4sleep00-21swapper/006:59:340
3084526048,8sleep70-21swapper/707:04:147
324732570,0sleep10-21swapper/109:47:101
254762500,0sleep50-21swapper/510:21:185
225312500,0sleep40-21swapper/409:19:344
219742500,0sleep70-21swapper/712:24:317
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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