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2026-03-30 - 02:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Mon Mar 30, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
131122920,0sleep70-21swapper/723:50:327
132662720,0sleep70-21swapper/723:39:197
212682690,0sleep70-21swapper/722:23:277
94542510,2sleep21179199cyclictest22:17:052
74642500,0sleep6641ktimersoftd/623:05:306
135262500,1sleep51-21systemd23:20:435
101362500,0sleep10-21swapper/121:14:011
101362500,0sleep10-21swapper/121:14:011
162212490,0sleep116217-21systemd-cgroups00:29:511
161392490,1sleep016123-21cp21:53:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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