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2026-08-15 - 23:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Sat Aug 15, 2026 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
162382880,0sleep316234-21sshd12:10:123
173962740,0sleep40-21swapper/410:07:114
41602540,0sleep70-21swapper/709:15:567
53222530,0sleep773-21ksoftirqd/710:24:367
188202530,0sleep7721ktimersoftd/709:29:267
249922520,0sleep50-21swapper/509:27:555
279612510,1sleep449-21ksoftirqd/411:30:574
12482510,0sleep60-21swapper/612:14:486
317442500,0sleep50-21swapper/510:58:385
258462500,0sleep50-21swapper/511:49:005
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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