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2026-09-06 - 08:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Sun Sep 06, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
112382950,1sleep211236-21sshd21:49:162
65952880,2sleep12755499cyclictest21:48:591
142822750,0sleep00-21swapper/000:16:190
277352580,6sleep60-21swapper/621:46:156
90572550,0sleep00-21swapper/021:29:360
126792520,1sleep212628-21sshd22:12:462
262472510,1sleep626245-21sshd23:28:036
90032500,1sleep3391rcuc/322:00:463
2734124836,8sleep70-21swapper/719:03:467
2720824837,8sleep30-21swapper/319:01:573
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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