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2026-03-11 - 04:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Wed Mar 11, 2026 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
324222860,2sleep1326199cyclictest23:55:291
3562740,0sleep00-21swapper/022:53:050
3562740,0sleep00-21swapper/022:53:050
233842690,0sleep1241ktimersoftd/122:32:241
43992580,0sleep20-21swapper/223:59:232
310462560,0sleep40-21swapper/422:27:224
158242560,0sleep70-21swapper/700:36:527
110822550,0sleep30-21swapper/300:29:113
305325425,18sleep50-21swapper/519:06:085
275842500,0sleep50-21swapper/522:49:105
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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