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2025-12-14 - 20:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Sun Dec 14, 2025 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
279562940,0sleep7711rcuc/709:29:577
167082670,1sleep016689-21sd-pam10:19:550
35832520,0sleep10-21swapper/111:38:531
31622510,0sleep60-21swapper/611:03:506
22442510,0sleep10-21swapper/110:05:471
279492490,0sleep00-21swapper/010:39:170
107402450,1sleep50-21swapper/509:09:375
246242440,0sleep00-21swapper/009:11:560
119512440,1sleep773-21ksoftirqd/707:31:547
63222430,1sleep09-21ksoftirqd/011:45:160
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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