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2026-03-27 - 19:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack3slot0.osadl.org (updated Fri Mar 27, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
77882920,2sleep4571999cyclictest11:57:504
228702750,1sleep222867-21sshd11:23:202
92812730,1sleep79279-21sshd11:20:457
188342590,0sleep5551rcuc/511:56:395
86292510,1sleep48628-21sshd11:50:294
3642510,0sleep6361-21systemd-cgroups12:01:136
151942500,2sleep11116-21nfsd09:44:281
530924926,9sleep70-21swapper/707:02:367
282442480,0sleep40-21swapper/410:27:484
136052480,0sleep60-21swapper/611:21:006
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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