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2026-01-29 - 19:29
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot0.osadl.org (updated Thu Jan 29, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
213239918023,82cyclictest11761-21systemd09:58:474
21339998443,0cyclictest0-21swapper/609:58:476
194212700,1sleep42132399cyclictest09:34:544
54492520,0sleep20-21swapper/211:16:562
21309995150,1cyclictest33-21ksoftirqd/209:58:472
1867025126,9sleep70-21swapper/707:03:317
97392480,0sleep10-21swapper/112:08:451
84732480,1sleep28472-21sshd10:50:132
248612480,1sleep024858-21sed09:18:240
133512480,1sleep013317-21sshd09:45:550
130622480,1sleep713061-21grepconf.sh10:33:287
2089924724,8sleep60-21swapper/607:05:066
283772460,1sleep7721ktimersoftd/709:22:237
283082460,0sleep10-21swapper/111:41:131
283082460,0sleep10-21swapper/111:41:131
298042450,0sleep40-21swapper/409:31:504
121092450,0sleep20-21swapper/212:05:012
106742450,0sleep10-21swapper/110:12:151
21346994441,1cyclictest1116-21nfsd09:58:467
128842440,0sleep50-21swapper/511:42:145
128842440,0sleep50-21swapper/511:42:145
274152430,0sleep427409-21sshd11:45:014
2087224324,15sleep10-21swapper/107:04:451
257402420,0sleep60-21swapper/612:17:236
127112420,0sleep30-21swapper/309:19:313
83962410,0sleep50-21swapper/511:26:365
73032400,0sleep50-21swapper/512:27:555
310482400,0sleep20-21swapper/211:29:532
275352400,0sleep50-21swapper/507:18:345
272622400,1sleep21-21systemd09:24:112
21289994040,0cyclictest2293-21kworker/0:109:58:470
2108324029,8sleep20-21swapper/207:07:432
1866724027,9sleep40-21swapper/407:03:284
1866624017,8sleep30-21swapper/307:03:273
264192390,0sleep40-21swapper/412:23:134
2088423926,9sleep00-21swapper/007:04:520
2084923926,9sleep50-21swapper/507:04:255
207532390,0sleep20-21swapper/211:21:362
197082390,0sleep10-21swapper/112:15:011
170812380,0sleep30-21swapper/307:53:473
325152370,2sleep62133999cyclictest11:53:046
295862320,0sleep10-21swapper/111:22:071
2130199320,32cyclictest15380-21kworker/1:109:58:461
2133199245,18cyclictest88050irq/26-em1-tx-009:58:475
2131699240,3cyclictest0-21swapper/309:58:473
281482190,2sleep22130999cyclictest12:19:272
21301991910,5cyclictest25-21ksoftirqd/110:38:341
21289991916,2cyclictest23519-21systemd12:05:430
73822180,0sleep60-21swapper/609:49:146
21309991816,1cyclictest33-21ksoftirqd/212:17:112
2130999181,1cyclictest131rcu_sched12:37:302
2130999181,1cyclictest131rcu_sched12:37:302
21301991816,1cyclictest25-21ksoftirqd/111:11:061
21301991815,1cyclictest25-21ksoftirqd/112:27:161
157562180,0sleep60-21swapper/609:13:576
277712170,0sleep60-21swapper/611:03:066
2130999177,1cyclictest33-21ksoftirqd/211:23:432
21309991716,1cyclictest33-21ksoftirqd/210:33:422
21309991715,1cyclictest33-21ksoftirqd/211:47:172
21309991715,1cyclictest33-21ksoftirqd/211:12:332
21309991714,1cyclictest33-21ksoftirqd/211:56:002
21309991713,4cyclictest33-21ksoftirqd/209:11:242
2130999170,1cyclictest131rcu_sched11:05:152
21301991716,1cyclictest25-21ksoftirqd/111:26:321
21301991715,1cyclictest25-21ksoftirqd/111:51:291
21301991715,1cyclictest25-21ksoftirqd/110:52:081
21301991713,1cyclictest25-21ksoftirqd/110:36:211
21289991715,2cyclictest7228-21kworker/u16:310:34:190
21289991715,2cyclictest10980-21kworker/u16:311:34:450
21331991614,2cyclictest26495-21systemd09:20:225
21331991614,1cyclictest57-21ksoftirqd/510:38:155
21309991615,1cyclictest33-21ksoftirqd/209:40:052
21309991614,2cyclictest33-21ksoftirqd/210:58:402
21309991614,1cyclictest33-21ksoftirqd/212:28:042
21309991614,1cyclictest33-21ksoftirqd/211:42:012
21309991614,1cyclictest33-21ksoftirqd/211:42:012
21309991614,1cyclictest33-21ksoftirqd/210:22:332
21309991614,1cyclictest33-21ksoftirqd/210:11:452
21309991614,1cyclictest33-21ksoftirqd/210:04:002
21309991614,1cyclictest33-21ksoftirqd/209:43:352
21309991614,1cyclictest33-21ksoftirqd/209:34:552
21309991613,2cyclictest33-21ksoftirqd/209:29:552
21309991613,1cyclictest33-21ksoftirqd/210:53:372
21301991615,1cyclictest25-21ksoftirqd/112:05:451
21301991614,1cyclictest25-21ksoftirqd/112:37:591
21301991614,1cyclictest25-21ksoftirqd/112:37:591
21301991614,1cyclictest25-21ksoftirqd/110:26:591
21301991614,1cyclictest25-21ksoftirqd/109:54:541
21301991614,1cyclictest25-21ksoftirqd/109:54:541
21301991614,1cyclictest25-21ksoftirqd/109:42:041
21301991614,1cyclictest25-21ksoftirqd/109:23:101
21301991612,1cyclictest25-21ksoftirqd/110:57:481
2130199161,1cyclictest131rcu_sched11:03:431
2130199160,15cyclictest15891-21kworker/1:009:25:271
21289991615,0cyclictest8687-21kworker/u16:411:14:430
21289991614,1cyclictest13585-21kworker/u16:210:20:230
21289991614,0cyclictest19308-21kworker/u16:410:52:010
21289991613,0cyclictest21896-21kworker/u16:312:38:050
21289991613,0cyclictest21896-21kworker/u16:312:38:050
135012160,1sleep713492-21bash11:26:547
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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