You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-23 - 04:53
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot0.osadl.org (updated Fri Jan 23, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
537221090,2sleep21650799cyclictest21:17:192
159332740,1sleep2784-21runrttasks23:52:412
291592540,5sleep70-21swapper/722:53:357
162312530,0sleep40-21swapper/422:47:084
238452520,1sleep323841-21sshd22:32:333
14312510,0sleep0111rcuc/023:25:320
68432490,0sleep06839-21sshd23:37:090
274482480,2sleep71652099cyclictest23:21:227
240552470,0sleep10-21swapper/121:58:271
222242470,2sleep71652099cyclictest23:04:087
1614724725,8sleep00-21swapper/019:05:220
226152460,2sleep51651099cyclictest21:23:555
195072460,0sleep40-21swapper/400:04:124
193072460,0sleep4481ktimersoftd/423:07:504
181912460,0sleep10-21swapper/100:06:021
92462450,0sleep30-21swapper/321:23:133
73352450,1sleep57333-21kill23:42:595
255252450,0sleep6631rcuc/623:36:196
187902450,0sleep21-21systemd22:37:522
88122440,0sleep2311rcuc/222:41:052
81212440,0sleep70-21swapper/722:56:007
69392440,0sleep00-21swapper/022:33:260
241642440,0sleep20-21swapper/222:30:402
122852440,1sleep21-21systemd23:33:432
88292430,0sleep40-21swapper/421:57:344
174332430,0sleep30-21swapper/300:19:013
103652430,1sleep710368-21bash21:59:297
1636224223,15sleep60-21swapper/619:08:166
80582410,0sleep00-21swapper/023:14:350
26242410,0sleep50-21swapper/500:31:375
230872410,0sleep40-21swapper/420:13:554
147152410,0sleep50-21swapper/523:09:195
147152410,0sleep50-21swapper/523:09:195
132602410,0sleep0111rcuc/023:09:140
132602410,0sleep0111rcuc/023:09:140
49592400,2sleep11650699cyclictest00:14:351
42722400,0sleep40-21swapper/423:16:234
30922400,0sleep20-21swapper/221:30:252
216512400,0sleep30-21swapper/323:47:303
19672400,0sleep50-21swapper/522:53:495
191302400,1sleep449-21ksoftirqd/422:36:024
1626224029,8sleep40-21swapper/419:06:544
1622924027,9sleep70-21swapper/719:06:257
1617624027,9sleep30-21swapper/319:05:413
159132400,0sleep00-21swapper/021:12:290
1621623927,8sleep50-21swapper/519:06:155
155452390,0sleep10-21swapper/121:29:121
110222390,1sleep01650599cyclictest22:43:110
226732380,0sleep00-21swapper/000:00:400
226732380,0sleep00-21swapper/000:00:400
19682380,0sleep70-21swapper/722:33:097
1623223827,8sleep10-21swapper/119:06:271
1610023827,8sleep20-21swapper/219:04:442
63042370,0sleep60-21swapper/622:33:246
252582330,1sleep325254-21sshd22:45:463
306362320,0sleep30-21swapper/322:53:393
270132260,1sleep726988-21sshd21:13:087
42342210,1sleep74230-21sshd23:12:337
42342210,1sleep74230-21sshd23:12:337
277532200,0sleep00-21swapper/022:13:400
16510992018,1cyclictest57-21ksoftirqd/522:09:495
16510992017,3cyclictest57-21ksoftirqd/521:56:465
268252190,0sleep60-21swapper/623:42:126
16510991917,1cyclictest57-21ksoftirqd/522:42:025
210842180,0sleep50-21swapper/500:23:205
16510991816,1cyclictest57-21ksoftirqd/521:59:055
16510991814,3cyclictest57-21ksoftirqd/522:34:365
90512170,0sleep70-21swapper/700:14:497
16513991716,1cyclictest65-21ksoftirqd/623:50:246
16510991714,3cyclictest57-21ksoftirqd/522:22:355
16510991714,1cyclictest57-21ksoftirqd/500:00:485
16510991714,1cyclictest57-21ksoftirqd/500:00:485
16513991615,1cyclictest65-21ksoftirqd/622:45:076
16513991615,1cyclictest65-21ksoftirqd/622:10:366
16513991614,1cyclictest65-21ksoftirqd/621:55:496
1651099169,2cyclictest57-21ksoftirqd/521:50:095
1651099168,5cyclictest57-21ksoftirqd/500:05:395
16510991615,1cyclictest57-21ksoftirqd/522:31:085
16510991614,1cyclictest57-21ksoftirqd/523:16:165
16510991614,1cyclictest57-21ksoftirqd/522:45:545
16510991614,1cyclictest57-21ksoftirqd/521:37:345
16510991614,1cyclictest57-21ksoftirqd/521:18:575
16510991614,1cyclictest57-21ksoftirqd/500:24:075
16510991613,2cyclictest57-21ksoftirqd/522:50:125
16510991613,2cyclictest57-21ksoftirqd/522:24:035
16510991612,3cyclictest57-21ksoftirqd/523:37:135
16510991611,4cyclictest57-21ksoftirqd/523:45:065
16510991610,2cyclictest57-21ksoftirqd/500:14:055
16508991616,0cyclictest0-21swapper/300:05:493
16507991613,1cyclictest33-21ksoftirqd/223:18:562
1650799160,0cyclictest0-21swapper/222:54:502
16506991614,1cyclictest25-21ksoftirqd/100:12:131
16506991612,1cyclictest25-21ksoftirqd/122:07:481
57952150,0sleep20-21swapper/222:21:592
311832150,0sleep0111rcuc/000:25:470
295392150,0sleep1686-21dbus-daemon00:01:051
295392150,0sleep1686-21dbus-daemon00:01:051
242532150,0sleep40-21swapper/422:17:204
16513991514,1cyclictest65-21ksoftirqd/621:34:016
16513991514,1cyclictest65-21ksoftirqd/600:06:086
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional