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2026-01-28 - 17:08
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot0.osadl.org (updated Wed Jan 28, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24712810,2sleep2546499cyclictest10:33:052
284412760,1sleep428437-21systemd10:38:364
14452640,1sleep41447-21bash11:42:034
201772520,0sleep30-21swapper/311:35:213
514925027,8sleep20-21swapper/207:06:372
316112490,0sleep6641ktimersoftd/612:35:236
171902490,1sleep233-21ksoftirqd/211:48:502
22852480,1sleep12288-21grepconf.sh12:14:441
155412480,1sleep715544-21bash09:28:317
145412480,0sleep70-21swapper/712:34:207
38952470,1sleep23901-21pmu-power12:33:432
254452470,0sleep225424-21sshd10:38:262
169582470,0sleep50-21swapper/511:43:005
112772470,0sleep30-21swapper/310:04:473
6772460,1sleep5674-21sshd12:37:235
57792460,0sleep6631rcuc/609:24:056
317032460,0sleep00-21swapper/010:13:330
319092450,0sleep10-21swapper/111:22:541
247982450,0sleep124797-21sshd10:18:471
222402450,0sleep70-21swapper/710:49:287
18842450,0sleep20-21swapper/210:25:122
145582450,0sleep20-21swapper/210:10:392
282162440,1sleep528215-21grepconf.sh10:42:215
233472440,0sleep30-21swapper/311:26:083
44422430,0sleep30-21swapper/310:38:593
98682420,0sleep40-21swapper/412:11:194
524824227,8sleep40-21swapper/407:07:514
81512410,0sleep70-21swapper/709:12:377
514124129,8sleep30-21swapper/307:06:303
513624128,9sleep70-21swapper/707:06:267
44292410,0sleep00-21swapper/011:54:010
240342410,0sleep20-21swapper/209:42:352
104532410,1sleep310455-21kworker/u16:109:14:413
139872400,2sleep1546399cyclictest12:24:531
510723926,9sleep50-21swapper/507:06:005
502123926,9sleep60-21swapper/607:04:496
501423926,9sleep10-21swapper/107:04:441
511123827,8sleep00-21swapper/007:06:030
203762310,0sleep10-21swapper/109:46:031
546299208,1cyclictest9-21ksoftirqd/009:53:530
5462992015,3cyclictest9-21ksoftirqd/010:06:150
163702200,0sleep30-21swapper/311:33:213
5469991911,3cyclictest73-21ksoftirqd/712:26:087
546299197,2cyclictest131rcu_sched10:27:260
5462991918,1cyclictest9-21ksoftirqd/010:44:270
5462991912,3cyclictest25880-21kworker/0:011:24:200
546299190,3cyclictest131rcu_sched11:10:000
291882190,0sleep20-21swapper/211:57:232
100342190,0sleep60-21swapper/609:55:056
5469991812,2cyclictest73-21ksoftirqd/710:01:447
5464991816,1cyclictest33-21ksoftirqd/212:09:242
5462991816,1cyclictest9-21ksoftirqd/011:33:420
5462991816,1cyclictest9-21ksoftirqd/011:16:070
5462991816,1cyclictest9-21ksoftirqd/011:16:070
5462991815,3cyclictest9-21ksoftirqd/012:10:380
5462991815,2cyclictest9-21ksoftirqd/012:05:130
5462991815,2cyclictest12515-21kworker/0:210:20:240
5462991814,4cyclictest9-21ksoftirqd/012:03:240
5462991814,4cyclictest9-21ksoftirqd/012:03:240
5462991814,1cyclictest9-21ksoftirqd/011:39:450
6322170,1sleep1608-21sshd10:30:481
5469991715,1cyclictest73-21ksoftirqd/710:28:447
5469991715,1cyclictest492-21systemd-journal09:46:397
5469991714,2cyclictest73-21ksoftirqd/711:12:257
5462991715,1cyclictest9-21ksoftirqd/011:50:310
5462991715,1cyclictest9-21ksoftirqd/011:18:440
5462991715,1cyclictest9-21ksoftirqd/010:56:530
5462991715,1cyclictest9-21ksoftirqd/010:38:220
5462991715,1cyclictest9-21ksoftirqd/010:29:160
5462991715,1cyclictest9-21ksoftirqd/009:30:330
313012170,0sleep00-21swapper/010:00:190
301762170,0sleep60-21swapper/612:01:116
301762170,0sleep60-21swapper/612:01:116
5469991615,1cyclictest73-21ksoftirqd/711:22:067
5469991614,1cyclictest73-21ksoftirqd/711:47:027
5469991614,1cyclictest73-21ksoftirqd/711:34:047
5469991614,1cyclictest73-21ksoftirqd/711:23:317
5469991614,1cyclictest73-21ksoftirqd/711:08:097
5469991612,1cyclictest73-21ksoftirqd/709:55:167
5468991614,1cyclictest65-21ksoftirqd/609:40:116
5462991615,1cyclictest9-21ksoftirqd/012:23:080
5462991615,1cyclictest9-21ksoftirqd/011:45:030
5462991615,1cyclictest9-21ksoftirqd/010:58:330
5462991615,1cyclictest9-21ksoftirqd/010:39:060
5462991615,1cyclictest9-21ksoftirqd/009:50:450
5462991615,0cyclictest16076-21kworker/u16:312:24:120
5462991614,1cyclictest9-21ksoftirqd/012:17:530
5462991614,1cyclictest9-21ksoftirqd/011:28:450
5462991614,1cyclictest9-21ksoftirqd/010:10:380
5462991614,1cyclictest9-21ksoftirqd/009:42:330
5462991614,1cyclictest9-21ksoftirqd/009:26:110
5462991611,3cyclictest29309-21kworker/0:212:37:160
5462991611,3cyclictest25880-21kworker/0:011:06:400
546299160,1cyclictest131rcu_sched09:15:020
196702160,0sleep50-21swapper/509:32:375
546999158,6cyclictest73-21ksoftirqd/709:39:577
5469991514,1cyclictest73-21ksoftirqd/712:13:477
5469991514,1cyclictest73-21ksoftirqd/710:56:357
5469991513,1cyclictest73-21ksoftirqd/712:01:357
5469991513,1cyclictest73-21ksoftirqd/712:01:357
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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