You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-24 - 23:57
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot0.osadl.org (updated Sat Jan 24, 2026 12:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
212009913752,48cyclictest21862-21systemd11:40:161
212009912051,29cyclictest0-21swapper/109:17:251
521021030,2sleep62120599cyclictest10:55:086
21207999593,1cyclictest1115-21nfsd09:17:247
21205999150,0cyclictest0-21swapper/609:17:256
2120299770,76cyclictest7346-21kworker/u16:511:40:163
21205996919,23cyclictest21726-21bash11:40:156
80452640,1sleep28041-21systemd11:16:262
8382540,2sleep32120299cyclictest09:59:063
26532510,0sleep12461-21sshd09:38:221
2104025127,8sleep30-21swapper/307:08:193
221462500,1sleep51-21systemd11:01:565
176872500,0sleep20-21swapper/210:15:312
2077824924,8sleep40-21swapper/407:04:434
89792480,1sleep78980-21grepconf.sh10:07:277
2119799470,46cyclictest7326-21kworker/0:411:40:150
192522470,1sleep219221-21sshd10:11:552
192522470,1sleep219221-21sshd10:11:552
169752470,0sleep20-21swapper/209:56:252
56122460,0sleep40-21swapper/410:57:064
302222460,0sleep00-21swapper/009:51:260
269452460,0sleep40-21swapper/410:04:284
2077024622,8sleep50-21swapper/507:04:365
207102460,0sleep50-21swapper/511:09:245
172452460,0sleep40-21swapper/412:33:414
140132460,0sleep10-21swapper/110:07:451
129202460,1sleep212903-21bash11:03:212
124572450,0sleep70-21swapper/711:53:157
255602440,0sleep2321ktimersoftd/212:01:352
20842440,0sleep30-21swapper/310:54:573
146442440,0sleep60-21swapper/612:27:506
83932430,0sleep48388-21sshd10:18:464
295852430,1sleep429588-21kworker/u16:410:35:444
268012420,1sleep526775-21sshd10:46:505
247172420,0sleep10-21swapper/109:29:491
180132420,2sleep32120299cyclictest10:15:323
169712420,1sleep125-21ksoftirqd/110:44:141
159062420,0sleep20-21swapper/211:26:352
117612420,0sleep10-21swapper/109:59:441
104782420,0sleep00-21swapper/011:03:110
94682410,0sleep09464-21sshd12:33:130
2105724129,8sleep00-21swapper/007:08:320
2083024129,8sleep70-21swapper/707:05:267
94882400,0sleep00-21swapper/007:43:460
77892400,0sleep60-21swapper/611:26:076
291292400,0sleep70-21swapper/711:02:227
280202400,0sleep40-21swapper/411:42:394
2081124028,9sleep60-21swapper/607:05:096
188792400,0sleep418865-21sshd12:31:494
21201993939,0cyclictest13550irq/24-ahci[00009:17:252
2099423928,8sleep10-21swapper/107:07:441
21204993838,0cyclictest20562-21kworker/5:309:17:245
21204993837,1cyclictest13221-21kworker/5:511:40:165
2096823827,8sleep20-21swapper/207:07:212
136762380,0sleep50-21swapper/512:06:355
86942370,0sleep40-21swapper/409:13:504
21201993735,2cyclictest13550irq/24-ahci[00011:40:162
281312360,0sleep10-21swapper/111:29:231
296192310,0sleep02119799cyclictest10:33:390
148342310,2sleep12120099cyclictest10:30:361
21202992725,1cyclictest10480-21kworker/u16:409:17:243
21201992317,3cyclictest33-21ksoftirqd/211:58:032
21201992116,3cyclictest33-21ksoftirqd/209:40:192
236592200,0sleep70-21swapper/709:47:257
146222200,0sleep00-21swapper/010:09:360
146222200,0sleep00-21swapper/010:09:360
240362190,0sleep70-21swapper/712:11:097
240362190,0sleep70-21swapper/712:11:097
2120199193,1cyclictest33-21ksoftirqd/211:12:372
21201991917,1cyclictest33-21ksoftirqd/210:53:052
21201991915,3cyclictest33-21ksoftirqd/209:47:292
21201991915,1cyclictest33-21ksoftirqd/210:43:482
21201991913,4cyclictest492-21systemd-journal12:14:192
21201991913,3cyclictest33-21ksoftirqd/209:32:342
2120199191,1cyclictest131rcu_sched11:22:512
2120199190,2cyclictest131rcu_sched12:05:012
137492190,1sleep449-21ksoftirqd/410:15:174
2120199185,1cyclictest33-21ksoftirqd/211:51:592
2120199182,3cyclictest33-21ksoftirqd/210:38:212
21201991816,1cyclictest33-21ksoftirqd/212:30:082
21201991816,1cyclictest33-21ksoftirqd/212:24:272
21201991816,1cyclictest33-21ksoftirqd/210:30:052
21201991816,1cyclictest33-21ksoftirqd/209:09:172
21201991814,1cyclictest33-21ksoftirqd/210:23:202
21201991814,1cyclictest33-21ksoftirqd/210:08:272
21201991810,5cyclictest33-21ksoftirqd/211:47:312
2120199181,1cyclictest0-21swapper/210:40:122
282052170,0sleep10-21swapper/112:17:121
21202991715,1cyclictest41-21ksoftirqd/311:14:553
2120199177,5cyclictest33-21ksoftirqd/209:23:472
2120199173,3cyclictest33-21ksoftirqd/210:27:082
2120199172,1cyclictest33-21ksoftirqd/211:33:502
21201991716,1cyclictest33-21ksoftirqd/209:22:502
21201991715,1cyclictest33-21ksoftirqd/212:38:062
21201991715,1cyclictest33-21ksoftirqd/212:19:392
21201991715,1cyclictest33-21ksoftirqd/210:01:182
21201991711,1cyclictest121rcu_preempt12:12:082
21201991711,1cyclictest121rcu_preempt12:12:082
55852160,0sleep60-21swapper/611:19:596
260132160,0sleep60-21swapper/609:20:336
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional