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2026-01-19 - 13:30
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack3slot0.osadl.org (updated Mon Jan 19, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
43659913418,44cyclictest1340-21systemd22:34:226
43599911631,85cyclictest0-21swapper/022:34:220
436499770,76cyclictest27603-21kworker/5:422:34:215
93832750,0sleep70-21swapper/722:11:157
436099710,71cyclictest24229-21kworker/1:022:34:221
181122600,1sleep318100-21sshd21:50:213
210402560,0sleep40-21swapper/419:34:084
385925026,8sleep00-21swapper/019:04:100
33382490,0sleep50-21swapper/522:01:045
136212480,1sleep0691-21systemd-logind22:09:000
218882470,1sleep51-21systemd23:49:165
85312460,0sleep10-21swapper/121:21:111
246072450,2sleep6436599cyclictest23:04:326
77682440,0sleep50-21swapper/521:25:485
320962440,0sleep20-21swapper/221:34:262
101142430,0sleep30-21swapper/322:32:413
57762420,0sleep45779-21kworker/u16:322:27:384
174902420,0sleep30-21swapper/322:14:153
143462420,0sleep40-21swapper/422:42:354
408024129,9sleep70-21swapper/719:07:147
386524129,9sleep60-21swapper/619:04:166
286742410,0sleep628673-21sshd23:52:136
23552410,1sleep42356-21grepconf.sh21:44:294
23552410,1sleep42356-21grepconf.sh21:44:294
170924129,8sleep50-21swapper/519:03:515
396924028,8sleep30-21swapper/319:05:413
314432400,0sleep70-21swapper/722:20:047
202432400,0sleep10-21swapper/121:24:151
180532400,0sleep20-21swapper/200:00:502
87782390,0sleep40-21swapper/422:18:334
393123927,9sleep10-21swapper/119:05:071
388123928,8sleep40-21swapper/419:04:304
254572390,0sleep70-21swapper/721:19:577
170623826,9sleep20-21swapper/219:03:482
157802380,0sleep70-21swapper/723:44:057
4361993635,1cyclictest1540-21kworker/2:422:34:222
235502360,0sleep30-21swapper/323:02:133
18662340,0sleep20-21swapper/200:30:302
18662340,0sleep20-21swapper/200:30:302
118322320,0sleep00-21swapper/022:30:220
436299280,1cyclictest0-21swapper/322:34:223
436699260,25cyclictest15671-21kworker/7:222:34:227
4363992424,0cyclictest8125-21kworker/4:322:34:224
4363992410,1cyclictest49-21ksoftirqd/400:35:194
436399237,2cyclictest49-21ksoftirqd/423:57:564
436399236,1cyclictest49-21ksoftirqd/423:08:374
89342220,1sleep38907-21sshd00:23:583
436399227,2cyclictest49-21ksoftirqd/421:37:234
262432210,6sleep10-21swapper/123:19:011
4364992014,5cyclictest16248-21systemd21:38:155
436399202,2cyclictest49-21ksoftirqd/423:37:154
4363992017,3cyclictest49-21ksoftirqd/422:01:434
4363992016,1cyclictest49-21ksoftirqd/423:26:484
4364991913,5cyclictest28599-21systemd00:20:395
436399199,3cyclictest49-21ksoftirqd/422:22:364
436399197,3cyclictest49-21ksoftirqd/400:26:394
436399196,2cyclictest49-21ksoftirqd/423:49:024
4363991915,3cyclictest49-21ksoftirqd/423:47:524
4363991915,1cyclictest49-21ksoftirqd/422:06:094
4363991914,4cyclictest49-21ksoftirqd/422:55:454
4359991915,0cyclictest15770-21kworker/u16:021:22:040
298362190,0sleep60-21swapper/623:42:526
436399189,3cyclictest49-21ksoftirqd/421:51:314
436399189,2cyclictest131rcu_sched00:33:214
436399189,2cyclictest131rcu_sched00:33:214
436399189,1cyclictest49-21ksoftirqd/422:52:294
436399188,4cyclictest49-21ksoftirqd/423:19:364
436399188,1cyclictest49-21ksoftirqd/422:10:464
436399185,3cyclictest49-21ksoftirqd/421:28:344
436399185,1cyclictest49-21ksoftirqd/423:39:464
436399182,1cyclictest49-21ksoftirqd/421:19:214
4363991815,2cyclictest49-21ksoftirqd/421:17:124
4365991712,1cyclictest1-21systemd21:48:436
4365991712,1cyclictest1-21systemd21:48:436
4364991713,4cyclictest57-21ksoftirqd/522:32:355
4364991711,6cyclictest10384-21systemd23:03:375
436399178,1cyclictest49-21ksoftirqd/400:03:594
436399173,1cyclictest49-21ksoftirqd/422:59:104
436399172,1cyclictest49-21ksoftirqd/422:45:024
436399172,1cyclictest49-21ksoftirqd/422:45:024
4363991714,1cyclictest49-21ksoftirqd/400:18:364
4363991713,1cyclictest49-21ksoftirqd/400:11:034
4363991713,1cyclictest49-21ksoftirqd/400:01:574
4361991715,1cyclictest33-21ksoftirqd/223:29:102
4359991715,1cyclictest28929-21kworker/u16:221:24:520
4359991714,2cyclictest20775-21systemd21:57:400
4359991712,3cyclictest21753-21kworker/0:100:19:120
436699160,1cyclictest0-21swapper/700:15:097
4364991612,1cyclictest4938-21systemd23:08:055
4364991611,1cyclictest1335-21systemd22:53:295
436399163,1cyclictest49-21ksoftirqd/421:30:244
4363991615,1cyclictest49-21ksoftirqd/423:15:114
4363991615,1cyclictest49-21ksoftirqd/421:54:424
4363991614,1cyclictest49-21ksoftirqd/421:39:494
4363991614,1cyclictest49-21ksoftirqd/421:09:004
4363991613,1cyclictest49-21ksoftirqd/423:09:044
4363991612,3cyclictest49-21ksoftirqd/400:21:504
436199168,5cyclictest33-21ksoftirqd/223:28:042
4361991615,1cyclictest33-21ksoftirqd/223:16:112
4361991614,1cyclictest33-21ksoftirqd/200:35:462
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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