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2026-06-14 - 13:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot0.osadl.org (updated Sun Jun 14, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5892890,3sleep2321ktimersoftd/222:27:562
126572770,0sleep60-21swapper/622:39:536
289032590,0sleep00-21swapper/000:05:330
208472560,0sleep20-21swapper/200:23:532
54742540,0sleep40-21swapper/422:15:004
122042520,2sleep2959899cyclictest21:56:482
324382510,0sleep60-21swapper/622:26:006
918525026,9sleep00-21swapper/019:05:100
912425027,8sleep20-21swapper/219:04:242
908425025,9sleep70-21swapper/719:03:497
914124824,9sleep60-21swapper/619:04:366
259262480,0sleep0758-21runrttasks23:19:520
64382470,0sleep00-21swapper/023:45:150
250242470,0sleep00-21swapper/000:35:290
17502470,1sleep51745-21systemd-cgroups23:39:195
34032460,0sleep70-21swapper/723:09:107
147542460,0sleep50-21swapper/521:12:225
300102450,1sleep2959899cyclictest23:16:252
134212450,0sleep40-21swapper/422:06:114
117142450,1sleep773-21ksoftirqd/722:26:417
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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