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2026-03-16 - 11:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot0.osadl.org (updated Mon Mar 16, 2026 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1746921000,0sleep20-21swapper/223:01:462
32752690,1sleep62578399cyclictest23:41:476
71422680,1sleep37141-21grepconf.sh23:58:343
319712550,1sleep131973-21sshd22:38:221
319712550,1sleep131973-21sshd22:38:221
265542530,0sleep20-21swapper/222:34:232
181802510,0sleep20-21swapper/222:09:482
2545724925,8sleep70-21swapper/719:04:237
326772480,1sleep632676-21systemd-cgroups23:15:366
2557924826,8sleep60-21swapper/619:06:076
23352480,0sleep50-21swapper/523:15:435
301212470,0sleep10-21swapper/123:19:071
2536224725,8sleep10-21swapper/119:03:051
78602460,0sleep60-21swapper/622:38:516
78602460,0sleep60-21swapper/622:38:516
185772460,0sleep70-21swapper/721:08:107
258792450,0sleep00-21swapper/022:49:110
130802450,0sleep70-21swapper/700:28:337
46122440,0sleep20-21swapper/221:26:232
34012440,0sleep50-21swapper/521:18:495
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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