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2025-10-16 - 11:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rack3slot0.osadl.org (updated Thu Oct 16, 2025 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
304812720,1sleep01839399cyclictest19:15:550
281272680,0sleep00-21swapper/022:29:180
272452510,0sleep00-21swapper/021:59:070
184672510,0sleep10-21swapper/121:10:551
1801825026,8sleep30-21swapper/318:53:013
1811924825,8sleep10-21swapper/118:54:271
235362470,1sleep423535-21grepconf.sh00:01:494
181702470,7sleep685350irq/25-em1-rx-022:39:576
134882460,0sleep40-21swapper/422:21:534
106922460,0sleep60-21swapper/621:10:116
100492460,0sleep20-21swapper/222:33:292
255882450,0sleep10-21swapper/122:57:461
87542440,0sleep30-21swapper/300:24:223
130422440,0sleep20-21swapper/221:51:482
117202440,0sleep60-21swapper/600:03:596
314932430,1sleep3763-21runrttasks22:17:363
138972430,0sleep40-21swapper/422:27:544
51842420,0sleep20-21swapper/222:05:582
3962420,1sleep665-21ksoftirqd/621:56:336
1813724230,9sleep50-21swapper/518:54:395
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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