You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-23 - 02:48
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #3, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  Eltec
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot5s.osadl.org (updated Fri Jan 23, 2026 00:43:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3009521460sleep12124050irq/29-eth0_g0_22:01:511
1211090ksoftirqd/12124150irq/30-eth0_g0_21:49:401
202812780sleep02124150irq/30-eth0_g0_21:21:480
121690ksoftirqd/12124050irq/29-eth0_g0_19:34:391
323152650sleep12124150irq/30-eth0_g0_19:59:391
136242640sleep12124150irq/30-eth0_g0_20:54:431
121630ksoftirqd/12124150irq/30-eth0_g0_21:04:460
189082530sleep12124150irq/30-eth0_g0_21:15:071
121510ksoftirqd/12124150irq/30-eth0_g0_23:04:480
99882480sleep02124150irq/30-eth0_g0_22:52:350
121480ksoftirqd/12124050irq/29-eth0_g0_00:03:021
121460ksoftirqd/12124050irq/29-eth0_g0_23:19:371
121460ksoftirqd/12124050irq/29-eth0_g0_23:09:071
121460ksoftirqd/12124050irq/29-eth0_g0_22:53:241
121460ksoftirqd/12124050irq/29-eth0_g0_21:27:581
121450ksoftirqd/12124050irq/29-eth0_g0_23:29:391
121450ksoftirqd/12124050irq/29-eth0_g0_22:41:341
121450ksoftirqd/12124050irq/29-eth0_g0_22:09:581
121450ksoftirqd/12124050irq/29-eth0_g0_00:09:411
2124150440irq/30-eth0_g0_121ksoftirqd/100:14:401
2124050440irq/29-eth0_g0_470-21kworker/1:123:10:521
2124050440irq/29-eth0_g0_470-21kworker/1:122:18:581
2124050440irq/29-eth0_g0_121ksoftirqd/123:49:381
2124050440irq/29-eth0_g0_10820-21timerandwakeup22:54:471
121440ksoftirqd/12124050irq/29-eth0_g0_22:22:251
121440ksoftirqd/12124050irq/29-eth0_g0_21:30:191
121440ksoftirqd/12124050irq/29-eth0_g0_20:10:451
121440ksoftirqd/12124050irq/29-eth0_g0_20:10:451
121440ksoftirqd/12124050irq/29-eth0_g0_20:04:481
2124150430irq/30-eth0_g0_26191-21cpu23:59:380
2124050430irq/29-eth0_g0_13-21kworker/0:121:59:450
121430ksoftirqd/12124050irq/29-eth0_g0_19:19:471
121430ksoftirqd/12124050irq/29-eth0_g0_19:19:471
2124150420irq/30-eth0_g0_3359-21proc_pri22:24:450
2124150420irq/30-eth0_g0_1395-21open_inodes20:04:450
2124050420irq/29-eth0_g0_30307-21/usr/sbin/munin19:49:461
2124050420irq/29-eth0_g0_121ksoftirqd/121:34:431
2124050420irq/29-eth0_g0_121ksoftirqd/100:33:071
121420ksoftirqd/12124150irq/30-eth0_g0_23:48:260
121420ksoftirqd/12124050irq/29-eth0_g0_20:45:511
121420ksoftirqd/12124050irq/29-eth0_g0_20:45:511
2124150410irq/30-eth0_g0_31ksoftirqd/023:36:560
2124150410irq/30-eth0_g0_31ksoftirqd/023:24:210
2124150410irq/30-eth0_g0_31ksoftirqd/022:29:420
2124150410irq/30-eth0_g0_17810-21if_eth023:24:400
2124150410irq/30-eth0_g0_13-21kworker/0:123:15:360
2124050410irq/29-eth0_g0_125212sleep123:03:321
121410ksoftirqd/12124150irq/30-eth0_g0_23:40:080
121410ksoftirqd/12124050irq/29-eth0_g0_23:46:011
121410ksoftirqd/12124050irq/29-eth0_g0_22:41:560
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional