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2026-05-12 - 14:00

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #3, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Eltec
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack3slot5s.osadl.org (updated Tue May 12, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1211020ksoftirqd/1121550irq/30-eth0_g0_07:57:341
121850ksoftirqd/1121450irq/29-eth0_g0_07:18:590
121850ksoftirqd/1121450irq/29-eth0_g0_07:18:590
261112630sleep0121550irq/30-eth0_g0_09:29:370
261112630sleep0121550irq/30-eth0_g0_09:29:370
321702550sleep0121450irq/29-eth0_g0_10:29:240
121510ksoftirqd/1121550irq/30-eth0_g0_09:37:041
121490ksoftirqd/1121550irq/30-eth0_g0_11:47:041
121490ksoftirqd/1121550irq/30-eth0_g0_09:54:211
121470ksoftirqd/1121550irq/30-eth0_g0_11:02:510
121470ksoftirqd/1121550irq/30-eth0_g0_10:42:401
121460ksoftirqd/1121550irq/30-eth0_g0_12:28:421
121460ksoftirqd/1121550irq/30-eth0_g0_12:28:421
121460ksoftirqd/1121550irq/30-eth0_g0_11:05:291
121460ksoftirqd/1121450irq/29-eth0_g0_11:24:091
121450ksoftirqd/1121550irq/30-eth0_g0_12:16:011
121550440irq/30-eth0_g0_1221-21kworker/1:211:17:481
309022430sleep1121550irq/30-eth0_g0_10:17:201
121550430irq/30-eth0_g0_260652sleep109:29:061
121550430irq/30-eth0_g0_260652sleep109:29:061
121550430irq/30-eth0_g0_1221-21kworker/1:212:34:011
121550430irq/30-eth0_g0_1221-21kworker/1:212:22:561
121550430irq/30-eth0_g0_1221-21kworker/1:210:59:001
121550430irq/30-eth0_g0_1221-21kworker/1:209:19:411
121550430irq/30-eth0_g0_121ksoftirqd/110:56:131
121430ksoftirqd/1121550irq/30-eth0_g0_11:13:391
121430ksoftirqd/1121450irq/29-eth0_g0_11:51:581
121430ksoftirqd/1121450irq/29-eth0_g0_11:51:581
121430ksoftirqd/1121450irq/29-eth0_g0_11:36:101
121450420irq/29-eth0_g0_31ksoftirqd/012:17:280
121420ksoftirqd/1121450irq/29-eth0_g0_09:50:190
121550410irq/30-eth0_g0_1221-21kworker/1:212:11:011
121550410irq/30-eth0_g0_1221-21kworker/1:212:07:401
121550410irq/30-eth0_g0_1221-21kworker/1:212:03:131
121550410irq/30-eth0_g0_1221-21kworker/1:210:06:491
121550410irq/30-eth0_g0_1221-21kworker/1:209:10:441
121450410irq/29-eth0_g0_13-21kworker/0:112:10:330
121450410irq/29-eth0_g0_13-21kworker/0:110:14:530
121450410irq/29-eth0_g0_13-21kworker/0:109:17:470
121450410irq/29-eth0_g0_11805-21cyclictest07:09:000
121410ksoftirqd/1121550irq/30-eth0_g0_10:11:400
121410ksoftirqd/1121550irq/30-eth0_g0_07:38:160
121550400irq/30-eth0_g0_1221-21kworker/1:209:40:151
121550400irq/30-eth0_g0_121ksoftirqd/111:56:211
121450400irq/29-eth0_g0_31ksoftirqd/010:58:050
121450400irq/29-eth0_g0_13-21kworker/0:112:06:190
121450400irq/29-eth0_g0_13-21kworker/0:111:58:500
121450400irq/29-eth0_g0_13-21kworker/0:111:16:050
121450400irq/29-eth0_g0_13-21kworker/0:109:44:050
121400ksoftirqd/1121550irq/30-eth0_g0_10:47:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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