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2026-03-06 - 05:38
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 792 highest latencies:
System rack4slot1.osadl.org (updated Thu Mar 05, 2026 19:41:21)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2092322050,6sleep30-21swapper/319:11:443
228532920,5sleep122852-21grep19:16:411
228532920,5sleep122852-21grep19:16:411
213592800,3sleep20-21swapper/219:12:562
199602530,2sleep019746-21ls19:11:290
274632350,1sleep127492-21latency_hist19:31:241
274632350,1sleep127492-21latency_hist19:31:241
269332280,3sleep30-21swapper/319:26:553
269332280,3sleep30-21swapper/319:26:553
2127499271,9cyclictest26625-21find19:26:392
2127499271,9cyclictest26625-21find19:26:392
280802250,3chrt0-21swapper/119:31:311
21274992515,7cyclictest73-21kswapd019:21:432
21274992515,7cyclictest73-21kswapd019:21:432
21274992513,9cyclictest22846-21find19:16:392
21274992513,9cyclictest22846-21find19:16:392
2127299241,20cyclictest29565-21cut19:36:290
2127299241,20cyclictest29565-21cut19:36:290
21274992312,8cyclictest28456-21find19:31:382
212232234,11sleep10-21swapper/119:11:511
2127299227,13cyclictest22891-21wc19:16:410
2127299227,13cyclictest22891-21wc19:16:410
281662210,3sleep30-21swapper/319:31:333
2127499205,4cyclictest0-21swapper/219:41:242
2127499205,4cyclictest0-21swapper/219:41:242
2127299201,16cyclictest25924-21fschecks_time19:26:300
2127299201,16cyclictest25924-21fschecks_time19:26:300
2127299201,11cyclictest28183-21ntp_states19:31:340
21273991811,5cyclictest0-21swapper/119:36:351
21273991811,5cyclictest0-21swapper/119:36:351
21275991711,4cyclictest0-21swapper/319:16:403
21275991711,4cyclictest0-21swapper/319:16:403
2127399172,2cyclictest131rcu_preempt19:21:431
2127399172,2cyclictest131rcu_preempt19:21:431
2127299176,8cyclictest23989-21cut19:21:310
2127299176,8cyclictest23989-21cut19:21:310
301482140,3sleep30-21swapper/319:36:363
301482140,3sleep30-21swapper/319:36:363
2127599121,9cyclictest25351-21chrt19:25:313
2127599121,9cyclictest25351-21chrt19:25:313
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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