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2026-04-19 - 20:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Sun Apr 19, 2026 12:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
216222196180,11sleep10-21swapper/107:09:041
214252191174,12sleep00-21swapper/007:06:340
215152181164,12sleep30-21swapper/307:07:453
214022172155,13sleep20-21swapper/207:06:152
217562500,0sleep10-21swapper/109:11:221
262902460,0sleep30-21swapper/309:45:153
149492450,0sleep20-21swapper/212:18:302
3662440,0sleep10-21swapper/111:39:341
298942440,0sleep10-21swapper/112:10:051
312052130,0sleep10-21swapper/110:35:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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