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2026-04-12 - 20:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Sun Apr 12, 2026 12:44:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
238802202186,12sleep10-21swapper/107:06:071
219662194178,12sleep00-21swapper/007:05:090
239292190173,12sleep30-21swapper/307:06:463
219632162144,13sleep20-21swapper/207:05:082
199622460,0sleep10-21swapper/111:47:231
85212430,0sleep10-21swapper/110:22:431
255642430,0sleep10-21swapper/111:34:421
14952410,0sleep10-21swapper/112:25:471
241592380,0sleep00-21swapper/011:49:590
26805290,0sleep20-21swapper/210:15:202
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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