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2026-05-23 - 00:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Fri May 22, 2026 12:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
179262204190,10sleep10-21swapper/107:08:361
177142193177,12sleep30-21swapper/307:05:543
177532189173,12sleep00-21swapper/007:06:220
180262177161,12sleep20-21swapper/207:09:542
225942660,0sleep30-21swapper/311:04:413
94772470,0sleep20-21swapper/212:33:402
133522450,0sleep00-21swapper/008:00:190
318092440,0sleep00-21swapper/010:36:490
193462430,0sleep20-21swapper/209:43:332
95582420,0sleep20-21swapper/210:25:422
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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