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2025-11-02 - 18:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Sun Nov 02, 2025 12:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
268992198182,11sleep10-21swapper/107:08:161
266782198181,12sleep30-21swapper/307:05:263
269182196179,12sleep00-21swapper/007:08:310
270092177161,11sleep20-21swapper/207:09:412
177222460,0sleep10-21swapper/109:39:401
290642450,0sleep20-21swapper/210:33:502
273262450,0sleep10-21swapper/111:38:071
122752440,0sleep10-21swapper/112:03:201
34422430,0sleep10-21swapper/108:30:141
75032420,0sleep10-21swapper/112:34:081
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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