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2026-05-30 - 02:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Sat May 30, 2026 00:44:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
275162188172,12sleep10-21swapper/119:07:511
275332187169,13sleep30-21swapper/319:08:053
254572187171,12sleep00-21swapper/019:05:040
274202173153,15sleep20-21swapper/219:06:362
203152500,0sleep10-21swapper/100:18:171
114182430,0sleep10-21swapper/121:19:381
162042420,0sleep20-21swapper/222:56:112
105182400,0sleep00-21swapper/022:37:520
252732380,0sleep10-21swapper/100:05:001
26389290,0sleep00-21swapper/021:26:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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