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2025-09-18 - 16:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Thu Sep 18, 2025 12:44:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
108792206191,10sleep10-21swapper/107:08:241
106822201183,13sleep30-21swapper/307:05:493
108882184166,13sleep00-21swapper/007:08:310
109622176160,12sleep20-21swapper/207:09:302
292612500,0sleep30-21swapper/312:20:043
41962470,0sleep10-21swapper/111:00:591
30222430,0sleep10-21swapper/110:44:581
252622430,0sleep10-21swapper/112:00:491
263562390,0sleep00-21swapper/012:35:060
34002360,1sleep1201rcuc/109:55:211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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