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2026-04-26 - 20:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Sun Apr 26, 2026 12:44:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
309732204189,11sleep10-21swapper/107:08:321
288722194175,14sleep00-21swapper/007:05:100
307902181163,13sleep30-21swapper/307:06:093
310672171155,12sleep20-21swapper/207:09:412
4212460,0sleep00-21swapper/009:43:480
48392450,0sleep10-21swapper/109:45:211
28702420,0sleep20-21swapper/211:51:082
28702420,0sleep20-21swapper/211:51:082
56382400,0sleep30-21swapper/312:09:073
221142120,0sleep20-21swapper/210:41:122
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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