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2025-11-29 - 08:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Fri Nov 28, 2025 12:44:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
61792199183,11sleep10-21swapper/107:09:361
59612194178,11sleep30-21swapper/307:06:493
59582188172,11sleep00-21swapper/007:06:470
60672116100,12sleep20-21swapper/207:08:122
13042550,0sleep20-21swapper/209:57:142
108112460,0sleep10-21swapper/109:14:221
168292440,0sleep316826-21aten2_r5power_v12:15:123
63949991,7cyclictest0-21swapper/311:20:113
63899960,6cyclictest0-21swapper/212:10:102
63899960,6cyclictest0-21swapper/211:33:572
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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