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2026-05-16 - 00:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rack5slot2.osadl.org (updated Fri May 15, 2026 12:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
211122190174,12sleep00-21swapper/007:08:350
209852190174,11sleep10-21swapper/107:06:591
209672190173,12sleep30-21swapper/307:06:463
21114211699,12sleep20-21swapper/207:08:372
173842470,0sleep00-21swapper/010:28:270
195992440,0sleep10-21swapper/110:29:491
71652430,0sleep20-21swapper/210:55:122
54912130,0sleep30-21swapper/311:25:233
138862100,0sleep30-21swapper/311:14:273
28641290,0sleep00-21swapper/010:18:030
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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