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2026-03-05 - 14:15
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot2.osadl.org (updated Thu Mar 05, 2026 12:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
162472225208,12sleep10-21swapper/107:05:591
164862198180,13sleep30-21swapper/307:09:063
164252194161,27sleep00-21swapper/007:08:180
163722175158,12sleep20-21swapper/207:07:362
168722570,0sleep20-21swapper/209:58:592
130902500,0sleep20-21swapper/210:44:472
23122480,1sleep01675199cyclictest10:07:200
186342460,0sleep318637-21unixbench_multi07:10:213
90192430,0sleep10-21swapper/112:17:281
257792430,0sleep10-21swapper/111:06:071
167519992,3cyclictest22335-21munin-run07:20:000
167519982,3cyclictest29957-21munin-run07:35:010
167519970,3cyclictest4482-21munin-run11:59:590
167619960,3cyclictest18832-21ntp_states08:15:192
167519960,6cyclictest0-21swapper/012:12:180
167519960,6cyclictest0-21swapper/009:59:310
167519960,3cyclictest30492-21perf09:50:010
167519960,3cyclictest20098-21munin-run11:20:010
167519960,1cyclictest4749-21ssh12:31:060
167519960,1cyclictest0-21swapper/009:10:500
167669955,0cyclictest5420-21kworker/3:208:16:423
167669955,0cyclictest40-21ksoftirqd/311:20:123
167669955,0cyclictest40-21ksoftirqd/310:50:123
167669955,0cyclictest40-21ksoftirqd/307:15:093
167669955,0cyclictest0-21swapper/312:35:423
167669954,1cyclictest40-21ksoftirqd/309:20:013
167669954,1cyclictest1964-21ssh10:23:093
167669953,2cyclictest40-21ksoftirqd/309:50:013
167669953,1cyclictest40-21ksoftirqd/312:15:013
167669950,5cyclictest0-21swapper/311:37:393
167669950,5cyclictest0-21swapper/311:13:213
167669950,5cyclictest0-21swapper/310:00:543
167669950,5cyclictest0-21swapper/307:35:233
167669950,4cyclictest9354-21df_inode09:55:133
167669950,4cyclictest22426-21ssh11:05:123
167669950,4cyclictest0-21swapper/309:05:123
167669950,4cyclictest0-21swapper/308:45:123
167669950,1cyclictest81rcu_preempt12:30:123
167669950,0cyclictest17713-21ssh11:02:253
167669950,0cyclictest17713-21ssh11:02:253
167619955,0cyclictest0-21swapper/212:33:192
167619955,0cyclictest0-21swapper/209:10:392
167619951,4cyclictest0-21swapper/211:20:122
167619950,5cyclictest0-21swapper/212:38:242
167619950,5cyclictest0-21swapper/211:52:182
167619950,5cyclictest0-21swapper/211:48:052
167619950,5cyclictest0-21swapper/211:05:432
167619950,5cyclictest0-21swapper/209:21:062
167619950,0cyclictest0-21swapper/210:01:082
167569951,2cyclictest0-21swapper/108:20:111
167569951,2cyclictest0-21swapper/107:25:121
167569950,5cyclictest0-21swapper/112:36:291
167569950,5cyclictest0-21swapper/112:30:391
167569950,5cyclictest0-21swapper/111:59:311
167569950,5cyclictest0-21swapper/111:28:051
167569950,5cyclictest0-21swapper/108:50:391
167569950,0cyclictest0-21swapper/111:54:341
167519952,3cyclictest0-21swapper/011:37:230
167519951,2cyclictest0-21swapper/009:30:120
167519950,5cyclictest0-21swapper/012:35:420
167519950,5cyclictest0-21swapper/012:25:220
167519950,5cyclictest0-21swapper/012:15:060
167519950,5cyclictest0-21swapper/012:05:300
167519950,5cyclictest0-21swapper/012:00:270
167519950,5cyclictest0-21swapper/011:51:060
167519950,5cyclictest0-21swapper/011:41:470
167519950,5cyclictest0-21swapper/011:25:100
167519950,5cyclictest0-21swapper/011:20:230
167519950,5cyclictest0-21swapper/011:10:350
167519950,5cyclictest0-21swapper/011:05:270
167519950,5cyclictest0-21swapper/011:00:430
167519950,5cyclictest0-21swapper/011:00:420
167519950,5cyclictest0-21swapper/010:57:190
167519950,5cyclictest0-21swapper/010:51:430
167519950,5cyclictest0-21swapper/010:41:030
167519950,5cyclictest0-21swapper/010:35:220
167519950,5cyclictest0-21swapper/010:30:060
167519950,5cyclictest0-21swapper/010:25:270
167519950,5cyclictest0-21swapper/010:22:070
167519950,5cyclictest0-21swapper/010:16:190
167519950,5cyclictest0-21swapper/010:10:110
167519950,5cyclictest0-21swapper/010:01:420
167519950,5cyclictest0-21swapper/009:51:390
167519950,5cyclictest0-21swapper/009:40:310
167519950,5cyclictest0-21swapper/009:35:220
167519950,5cyclictest0-21swapper/009:26:030
167519950,5cyclictest0-21swapper/009:22:230
167519950,5cyclictest0-21swapper/009:15:550
167519950,5cyclictest0-21swapper/008:20:150
167519950,5cyclictest0-21swapper/007:20:180
167519950,4cyclictest22522-21apt-get08:25:110
167519950,1cyclictest0-21swapper/012:20:210
167519950,1cyclictest0-21swapper/011:30:500
167519950,0cyclictest17780-21ssh10:46:230
32665240,0sleep20-21swapper/211:41:112
26067240,0sleep20-21swapper/209:47:222
167669944,0cyclictest40-21ksoftirqd/311:32:433
167669944,0cyclictest40-21ksoftirqd/311:25:123
167669944,0cyclictest40-21ksoftirqd/310:40:123
167669944,0cyclictest40-21ksoftirqd/310:35:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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