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2026-06-23 - 08:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot2.osadl.org (updated Tue Jun 23, 2026 00:44:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
233262199183,11sleep30-21swapper/319:07:043
235532194178,11sleep10-21swapper/119:10:001
235432184167,13sleep00-21swapper/019:09:550
232072175158,13sleep20-21swapper/219:05:352
146262480,0sleep10-21swapper/123:30:141
208262470,0sleep30-21swapper/321:25:413
305712450,0sleep20-21swapper/222:34:342
207032450,0sleep30-21swapper/322:29:453
187772430,0sleep218774-21ssh23:00:152
246842120,0sleep10-21swapper/122:47:051
10202120,0sleep30-21swapper/323:55:133
174282110,0sleep30-21swapper/321:24:533
295392100,0sleep30-21swapper/321:45:473
28230290,1sleep228233-21needreboot19:15:162
27259290,0sleep10-21swapper/100:24:341
237349992,3cyclictest205-21systemd-journal19:50:000
237349986,1cyclictest3-21ksoftirqd/022:15:120
237349984,1cyclictest3-21ksoftirqd/022:35:190
237349980,1cyclictest3-21ksoftirqd/022:20:160
237439973,1cyclictest31-21ksoftirqd/219:30:012
237349977,0cyclictest3-21ksoftirqd/023:05:120
237349975,0cyclictest3-21ksoftirqd/022:54:590
237349975,0cyclictest3-21ksoftirqd/021:40:010
237349974,0cyclictest3-21ksoftirqd/022:00:010
237349972,0cyclictest81rcu_preempt23:10:120
237349971,3cyclictest32128-21perf23:54:590
237349971,1cyclictest81rcu_preempt21:05:000
237349971,1cyclictest3-21ksoftirqd/019:10:180
237349970,3cyclictest27994-21perf00:24:590
237349970,1cyclictest81rcu_preempt21:15:120
237349970,1cyclictest3-21ksoftirqd/020:50:000
237349970,1cyclictest27671-21apt-key23:05:000
237439962,0cyclictest81rcu_preempt23:00:002
237439960,0cyclictest31-21ksoftirqd/221:05:012
237349965,1cyclictest3-21ksoftirqd/000:00:110
237349965,0cyclictest3-21ksoftirqd/023:45:000
237349965,0cyclictest3-21ksoftirqd/022:40:130
237349964,0cyclictest3-21ksoftirqd/023:25:160
237349964,0cyclictest3-21ksoftirqd/023:20:120
237349964,0cyclictest3-21ksoftirqd/022:10:150
237349964,0cyclictest3-21ksoftirqd/021:25:130
237349964,0cyclictest3-21ksoftirqd/000:35:210
237349963,1cyclictest3-21ksoftirqd/020:30:110
237349962,2cyclictest3-21ksoftirqd/023:55:140
237349962,1cyclictest3-21ksoftirqd/021:15:010
237349961,2cyclictest81rcu_preempt23:45:140
237349961,1cyclictest81rcu_preempt20:00:000
237349961,0cyclictest81rcu_preempt22:59:590
237349960,6cyclictest0-21swapper/022:25:090
237349960,0cyclictest81rcu_preempt21:00:000
237349960,0cyclictest6169-21apt-get00:30:120
237479955,0cyclictest9104-21kworker/3:123:44:323
237479955,0cyclictest9104-21kworker/3:123:22:083
237479955,0cyclictest9104-21kworker/3:123:10:573
237479955,0cyclictest9104-21kworker/3:122:14:583
237479955,0cyclictest9104-21kworker/3:121:41:253
237479955,0cyclictest9104-21kworker/3:121:07:473
237479955,0cyclictest9104-21kworker/3:120:56:353
237479955,0cyclictest9104-21kworker/3:120:00:383
237479955,0cyclictest9104-21kworker/3:119:49:263
237479955,0cyclictest9104-21kworker/3:119:38:133
237479955,0cyclictest9104-21kworker/3:119:15:523
237479955,0cyclictest9104-21kworker/3:100:06:563
237479950,5cyclictest0-21swapper/323:27:553
237479950,5cyclictest0-21swapper/323:17:533
237479950,5cyclictest0-21swapper/300:33:423
237479950,5cyclictest0-21swapper/300:27:353
237479950,5cyclictest0-21swapper/300:21:273
237479950,4cyclictest29568-21apt-get19:20:113
237439954,1cyclictest896-21grep22:35:192
237439951,1cyclictest31-21ksoftirqd/219:30:112
237439950,5cyclictest0-21swapper/223:55:112
237439950,5cyclictest0-21swapper/221:45:372
237439950,5cyclictest0-21swapper/200:25:132
237439950,4cyclictest0-21swapper/220:50:102
237439950,2cyclictest31-21ksoftirqd/223:10:122
237439950,0cyclictest81rcu_preempt21:15:002
237389951,2cyclictest0-21swapper/120:50:101
237389950,5cyclictest0-21swapper/121:35:241
237389950,5cyclictest0-21swapper/121:34:051
237389950,5cyclictest0-21swapper/119:14:591
237349955,0cyclictest3-21ksoftirqd/021:55:000
237349955,0cyclictest3-21ksoftirqd/021:45:010
237349955,0cyclictest3-21ksoftirqd/020:55:000
237349954,1cyclictest3-21ksoftirqd/000:30:010
237349954,0cyclictest3-21ksoftirqd/021:45:100
237349953,1cyclictest3-21ksoftirqd/022:30:150
237349953,0cyclictest3-21ksoftirqd/023:30:170
237349953,0cyclictest3-21ksoftirqd/021:30:110
237349953,0cyclictest3-21ksoftirqd/021:20:190
237349953,0cyclictest3-21ksoftirqd/000:15:150
237349953,0cyclictest3-21ksoftirqd/000:05:140
237349952,0cyclictest81rcu_preempt23:19:590
237349951,1cyclictest81rcu_preempt20:25:000
237349951,1cyclictest3-21ksoftirqd/019:40:160
237349951,1cyclictest3-21ksoftirqd/019:32:010
237349950,5cyclictest0-21swapper/020:25:120
237349950,4cyclictest31780-21memory00:10:160
237349950,1cyclictest81rcu_preempt23:35:180
237349950,1cyclictest3-21ksoftirqd/020:10:570
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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