You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-10 - 09:46
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rack5slot2.osadl.org (updated Tue Feb 10, 2026 00:44:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
80652202185,12sleep30-21swapper/319:07:543
81822180164,11sleep10-21swapper/119:09:241
79952180163,12sleep00-21swapper/019:06:590
78862172153,14sleep20-21swapper/219:05:362
92972480,0sleep10-21swapper/121:58:571
274322440,0sleep30-21swapper/300:30:013
133992440,0sleep00-21swapper/000:38:550
191012430,0sleep10-21swapper/122:03:381
94312160,0sleep10-21swapper/123:49:231
194272110,0sleep019430-21aten2_r5power_c00:10:120
176962100,0sleep317699-21unixbench_singl23:05:223
141222100,0sleep10-21swapper/123:20:091
84119995,2cyclictest40-21ksoftirqd/323:20:163
32721290,0sleep00-21swapper/000:16:010
84119982,1cyclictest40-21ksoftirqd/300:05:183
84119975,0cyclictest40-21ksoftirqd/300:15:133
84119964,0cyclictest40-21ksoftirqd/323:45:113
84119964,0cyclictest40-21ksoftirqd/323:10:183
84119964,0cyclictest40-21ksoftirqd/322:20:133
84119964,0cyclictest40-21ksoftirqd/322:05:013
84119964,0cyclictest40-21ksoftirqd/321:35:143
84119964,0cyclictest40-21ksoftirqd/321:20:133
84119964,0cyclictest40-21ksoftirqd/321:15:183
84119963,1cyclictest40-21ksoftirqd/321:05:013
84119963,1cyclictest40-21ksoftirqd/321:05:013
84119960,5cyclictest26844-21apt-get19:45:013
84119960,1cyclictest81rcu_preempt00:20:183
84119960,1cyclictest40-21ksoftirqd/319:40:173
84119960,1cyclictest29609-21cpuspeed_turbos22:40:143
84119960,1cyclictest22200-21tr22:05:143
84119960,0cyclictest81rcu_preempt23:50:183
84119960,0cyclictest81rcu_preempt23:25:183
84019961,3cyclictest0-21swapper/121:10:121
84009960,3cyclictest27013-21cron22:55:010
84119955,0cyclictest40-21ksoftirqd/322:45:123
84119955,0cyclictest40-21ksoftirqd/322:35:113
84119955,0cyclictest40-21ksoftirqd/320:15:143
84119955,0cyclictest0-21swapper/323:55:063
84119955,0cyclictest0-21swapper/322:30:063
84119954,1cyclictest40-21ksoftirqd/323:00:173
84119954,1cyclictest40-21ksoftirqd/321:25:183
84119954,1cyclictest40-21ksoftirqd/300:10:123
84119954,1cyclictest21116-21kworker/3:223:44:433
84119953,2cyclictest40-21ksoftirqd/319:10:103
84119953,0cyclictest40-21ksoftirqd/323:15:193
84119953,0cyclictest40-21ksoftirqd/319:25:153
84119952,0cyclictest40-21ksoftirqd/321:42:533
84119951,1cyclictest81rcu_preempt23:35:023
84119951,1cyclictest81rcu_preempt20:10:113
84119951,1cyclictest40-21ksoftirqd/320:50:193
84119951,0cyclictest81rcu_preempt00:35:123
84119950,5cyclictest0-21swapper/322:55:093
84119950,5cyclictest0-21swapper/322:16:093
84119950,5cyclictest0-21swapper/300:25:123
84119950,4cyclictest29513-21apt-get19:50:013
84119950,1cyclictest40-21ksoftirqd/323:30:133
84119950,1cyclictest40-21ksoftirqd/320:00:003
84119950,1cyclictest22182-21aten2_r5power_v20:40:123
84119950,0cyclictest81rcu_preempt20:55:013
84059953,1cyclictest18364-21ssh22:50:152
84059950,5cyclictest4264-21diskmemload00:35:252
84059950,5cyclictest0-21swapper/222:32:022
84059950,5cyclictest0-21swapper/222:21:432
84059950,5cyclictest0-21swapper/222:03:232
84059950,5cyclictest0-21swapper/221:25:422
84059950,5cyclictest0-21swapper/221:23:302
84059950,5cyclictest0-21swapper/200:17:052
84059950,0cyclictest0-21swapper/223:45:482
84019951,2cyclictest0-21swapper/120:30:101
84019951,2cyclictest0-21swapper/120:00:101
84009953,1cyclictest15757-21ntp_states21:30:190
84009950,0cyclictest0-21swapper/023:34:310
6439250,0sleep30-21swapper/321:10:213
84119944,0cyclictest40-21ksoftirqd/322:10:013
84119944,0cyclictest40-21ksoftirqd/321:50:143
84119944,0cyclictest40-21ksoftirqd/320:30:163
84119944,0cyclictest40-21ksoftirqd/320:25:223
84119944,0cyclictest40-21ksoftirqd/319:35:173
84119944,0cyclictest40-21ksoftirqd/319:20:173
84119944,0cyclictest40-21ksoftirqd/300:00:123
84119944,0cyclictest40-21ksoftirqd/300:00:123
84119944,0cyclictest21116-21kworker/3:220:23:113
84119943,1cyclictest40-21ksoftirqd/321:55:133
84119943,1cyclictest40-21ksoftirqd/321:45:193
84119940,4cyclictest0-21swapper/322:50:113
84119940,4cyclictest0-21swapper/320:05:123
84119940,4cyclictest0-21swapper/320:00:103
84119940,3cyclictest32088-21/usr/sbin/munin22:25:173
84119940,3cyclictest14074-21ssh21:30:043
84119940,3cyclictest11037-21ntp_states19:15:013
84119940,1cyclictest40-21ksoftirqd/321:05:163
84119940,1cyclictest0-21swapper/319:30:113
84119940,0cyclictest81rcu_preempt20:35:143
84059944,0cyclictest0-21swapper/223:00:512
84059944,0cyclictest0-21swapper/200:20:092
84059943,1cyclictest27797-21head20:50:132
84059943,1cyclictest17966-21ssh23:37:222
84059941,3cyclictest22745-21kworker/2:021:35:362
84059941,3cyclictest22231-21cat23:55:162
84059941,3cyclictest19534-21head00:25:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional