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2026-04-09 - 00:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot2.osadl.org (updated Wed Apr 08, 2026 12:44:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
256932194179,10sleep10-21swapper/107:08:431
256402193174,14sleep00-21swapper/007:08:030
255862191175,12sleep30-21swapper/307:07:253
254732172156,12sleep20-21swapper/207:05:552
283092450,0sleep10-21swapper/112:06:561
234852450,0sleep10-21swapper/111:00:461
43502440,0sleep00-21swapper/011:07:430
205742430,0sleep10-21swapper/109:05:171
309892420,0sleep00-21swapper/009:14:210
91372110,0sleep10-21swapper/109:19:301
259469992,3cyclictest29962-21nscd10:20:010
259469982,3cyclictest1645-21perf07:25:020
259469981,3cyclictest1800-21perf08:30:000
259479961,2cyclictest0-21swapper/109:35:121
259469960,3cyclictest28985-21munin-run09:45:020
7543250,0sleep10-21swapper/111:56:391
259609955,0cyclictest7873-21kworker/3:110:13:123
259609951,3cyclictest0-21swapper/309:15:123
259609951,2cyclictest0-21swapper/307:40:113
259609950,5cyclictest0-21swapper/312:15:383
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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