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2026-02-26 - 00:54
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack5slot2.osadl.org (updated Wed Feb 25, 2026 12:44:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
203402224207,11sleep10-21swapper/107:05:101
223002183166,12sleep00-21swapper/007:06:430
223032182165,12sleep30-21swapper/307:06:453
222802164144,15sleep20-21swapper/207:06:282
82592440,0sleep08261-21latency_hist12:15:000
261812420,0sleep20-21swapper/209:13:302
167742420,0sleep00-21swapper/009:55:280
160362420,0sleep016037-21ssh10:27:030
160362420,0sleep016037-21ssh10:27:030
73582390,0sleep10-21swapper/110:06:581
155552390,0sleep215557-21latency_hist09:40:012
2273799121,4cyclictest15883-21munin-run09:05:010
53402100,0sleep30-21swapper/311:40:523
2273799103,3cyclictest25843-21sendmail-msp08:20:010
227379991,4cyclictest24098-21munin-run11:35:000
227409981,6cyclictest0-21swapper/212:05:112
227379971,3cyclictest8953-21sendmail-msp10:40:020
227449960,5cyclictest0-21swapper/308:35:113
227449960,3cyclictest12286-21ssh12:16:193
24654250,0sleep30-21swapper/309:12:353
227449955,0cyclictest4688-21kworker/3:111:04:133
227449955,0cyclictest4688-21kworker/3:109:23:283
227449952,3cyclictest19836-21ssh11:48:333
227449951,2cyclictest0-21swapper/308:20:013
227449950,5cyclictest0-21swapper/310:45:113
227449950,5cyclictest0-21swapper/309:16:173
227449950,4cyclictest14452-21ssh11:30:123
227409955,0cyclictest0-21swapper/210:13:052
227409955,0cyclictest0-21swapper/210:02:452
227409955,0cyclictest0-21swapper/209:50:152
227409950,5cyclictest0-21swapper/211:10:522
227409950,5cyclictest0-21swapper/210:38:592
227389950,5cyclictest0-21swapper/111:01:101
227389950,5cyclictest0-21swapper/110:48:321
227389950,5cyclictest0-21swapper/110:21:011
227379955,0cyclictest0-21swapper/012:33:330
227379953,1cyclictest8444-21latency_hist08:50:010
227379950,5cyclictest32390-21munin-run11:55:010
227379950,5cyclictest19472-21fschecks_count12:20:160
227379950,0cyclictest0-21swapper/010:17:480
30184240,0sleep10-21swapper/107:20:201
227449944,0cyclictest4688-21kworker/3:111:15:243
227449944,0cyclictest4688-21kworker/3:107:42:433
227449944,0cyclictest40-21ksoftirqd/307:25:023
227449944,0cyclictest0-21swapper/310:50:163
227449943,1cyclictest4321-21tail07:35:133
227449942,1cyclictest3736-21ssh09:50:013
227449942,1cyclictest30078-21ssh11:21:173
227449941,3cyclictest814-21snmpd07:13:193
227449940,4cyclictest25009-21ssh11:50:283
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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