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2026-02-18 - 22:02
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #5, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Intel
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot4s.osadl.org (updated Wed Feb 18, 2026 12:44:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
315531321030,4sleep20-21swapper/211:16:072
31844572640,4sleep30-21swapper/311:46:063
2907466995448,5cyclictest3197662-21kworker/u8:2+events_unbound12:26:171
31375732520,5sleep2381ktimers/210:56:172
2907466995243,7cyclictest274-21systemd-journal08:40:001
2907466994943,4cyclictest2939566-21kworker/u8:2+events_unbound08:01:111
30866202460,4chrt0-21swapper/310:06:073
2907466994641,4cyclictest3004141-21kworker/u8:1+flush-8:009:16:031
2907466994639,5cyclictest3068690-21kworker/u8:0+flush-8:010:31:171
2907465994540,3cyclictest3133220-21kworker/u8:2+events_unbound11:06:040
2907466994440,3cyclictest2924477-21kworker/u8:1+events_unbound07:26:161
2907466994434,7cyclictest3222627-21latency_hist12:25:011
2907466994338,4cyclictest3053609-21kworker/u8:3+flush-8:009:56:171
2907466994335,6cyclictest3004201-21/usr/sbin/munin08:46:141
2907466994235,5cyclictest3172930-21kworker/u8:0+events_unbound11:46:101
2907466994233,6cyclictest3142844-21latency_hist11:05:011
2907466994137,3cyclictest3172930-21kworker/u8:0+events_unbound11:41:041
2907466994136,4cyclictest3163052-21kworker/u8:3+events_unbound12:01:121
2907466994136,4cyclictest3133220-21kworker/u8:2+flush-8:010:56:011
2907466994135,5cyclictest2887424-21kworker/u8:0+events_unbound08:21:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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