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2025-11-07 - 15:55

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #5, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Intel
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot4s.osadl.org (updated Fri Nov 07, 2025 12:44:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
258215821740,4sleep3586-21kworker/3:2-events08:36:253
2495558996157,3cyclictest2495393-21kworker/u8:3+events_unbound07:31:400
27094552580,5chrt0-21swapper/010:41:310
2495558995846,9cyclictest2516319-21ntpq07:26:360
2495561995753,3cyclictest2443193-21kworker/u8:1+flush-8:009:51:381
2495561995652,3cyclictest2722180-21kworker/u8:1+flush-8:011:31:321
2495558995652,3cyclictest2651612-21kworker/u8:3+events_unbound09:56:390
2495558995650,4cyclictest2626127-21kworker/u8:0+events_unbound09:41:390
2495561995548,3cyclictest2769830-21kworker/u8:2+events_unbound11:46:401
2495558995546,3cyclictest2464046-21kworker/u8:0+events_unbound07:21:390
2495558995450,3cyclictest2591897-21kworker/u8:2+events_unbound08:51:380
2495558995446,3cyclictest2621241-21kworker/u8:2+events_unbound09:16:410
27893832530,6chrt0-21swapper/212:01:312
2495561995347,4cyclictest2722180-21kworker/u8:1+events_unbound11:41:261
2495558995350,2cyclictest2739886-21kworker/u8:0+events_unbound11:11:420
2495558995349,3cyclictest2521941-21kworker/u8:2+events_unbound08:26:390
26066962520,2sleep3586-21kworker/3:2-events09:00:013
2495558995248,3cyclictest2606947-21kworker/u8:3+events_unbound09:31:260
2495558995248,3cyclictest2443193-21kworker/u8:1+events_unbound07:51:380
2495558995246,5cyclictest2779696-21kworker/u8:1+events_unbound12:11:220
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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