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2026-08-12 - 14:50

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #5, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Intel
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rack5slot4s.osadl.org (updated Wed Aug 12, 2026 12:44:14)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4868599204199,3cyclictest213225-21strings09:52:552
4868599193183,7cyclictest291675-21cut11:12:522
4868299155151,2cyclictest0-21swapper/109:52:551
4868099145128,15cyclictest0-21swapper/009:52:550
4868299138132,3cyclictest291676-21tr11:12:521
4868099130112,16cyclictest0-21swapper/011:12:520
27682921000,6chrt0-21swapper/210:57:532
48682995752,4cyclictest249004-21kworker/u8:0+flush-8:010:43:001
48682995651,3cyclictest4194100-21kworker/u8:1+events_unbound07:27:471
48682995549,4cyclictest268996-21kworker/u8:3+events_unbound12:17:511
48682995448,4cyclictest298917-21kworker/u8:1+events_unbound11:58:031
48682995348,4cyclictest298917-21kworker/u8:1+events_unbound12:02:581
48682995248,2cyclictest174743-21kworker/u8:0+events_unbound09:22:481
48682995246,5cyclictest114716-21kworker/u8:0+flush-8:008:22:481
48682995246,4cyclictest4194100-21kworker/u8:1+flush-8:007:15:051
48682995243,6cyclictest174494-21latency_hist09:15:011
48682995145,4cyclictest298917-21kworker/u8:1+flush-8:012:08:021
48680995144,5cyclictest367874-21latency_hist12:30:010
48682994944,4cyclictest234101-21kworker/u8:2+flush-8:011:38:001
48682994943,5cyclictest85220-21kworker/u8:0+events_unbound07:58:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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