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2026-07-11 - 07:35

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #5, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Intel
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rack5slot4s.osadl.org (updated Sat Jul 11, 2026 00:44:15)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
83885023670,2sleep3451irq_work/319:30:123
815152998073,5cyclictest794648-21kworker/u8:2+events_unbound19:50:251
815148996357,4cyclictest956722-21kworker/u8:3+flush-8:023:00:180
815152996155,5cyclictest956722-21kworker/u8:3+events_unbound22:45:181
815152996155,5cyclictest956722-21kworker/u8:3+events_unbound22:45:181
815152996152,7cyclictest870932-21ntpq20:00:181
815152996152,7cyclictest870932-21ntpq20:00:181
815152996055,4cyclictest956722-21kworker/u8:3+events_unbound22:35:171
815148996054,4cyclictest950332-21kworker/u8:2+flush-8:021:25:180
815148996052,5cyclictest1704890-21systemd-journal20:35:180
815152995753,2cyclictest841697-21kworker/u8:1+events_unbound21:20:171
815152995752,4cyclictest1090106-21kworker/u8:3+flush-8:023:50:181
815152995744,4cyclictest916752-21kworker/u8:2+flush-8:020:55:171
815152995651,4cyclictest3650584-21kworker/u8:0+events_unbound19:40:191
815148995650,5cyclictest841697-21kworker/u8:1+flush-8:020:10:190
815152995548,5cyclictest841697-21kworker/u8:1+flush-8:020:40:171
815152995443,9cyclictest1704890-21systemd-journal22:55:171
815152995348,3cyclictest916752-21kworker/u8:2+flush-8:021:00:171
815148995247,4cyclictest1101738-21kworker/u8:2+flush-8:023:55:150
815148995246,4cyclictest950332-21kworker/u8:2+flush-8:021:35:210
11176592510,3sleep375-21kworker/3:1+events00:10:133
815152995045,4cyclictest966141-21kworker/u8:0+flush-8:022:30:211
815152995045,4cyclictest956722-21kworker/u8:3+flush-8:022:50:181
815152995045,4cyclictest950332-21kworker/u8:2+flush-8:023:10:171
815152995045,4cyclictest905738-21kworker/u8:3+events_unbound21:10:201
815152995045,4cyclictest841697-21kworker/u8:1+events_unbound20:50:191
815152995045,3cyclictest950332-21kworker/u8:2+flush-8:022:05:201
815152995043,5cyclictest1134664-21kworker/u8:2+flush-8:000:30:181
815148995042,6cyclictest841697-21kworker/u8:1+flush-8:019:55:170
815152994943,5cyclictest950332-21kworker/u8:2+flush-8:022:15:221
815152994943,5cyclictest882523-21kworker/u8:2+flush-8:020:30:161
815148994945,3cyclictest841697-21kworker/u8:1+events_unbound21:10:090
815148994943,5cyclictest966141-21kworker/u8:0+flush-8:021:55:160
815152994843,3cyclictest950332-21kworker/u8:2+events_unbound23:30:161
815152994742,4cyclictest465241-21kworker/u8:3+events_unbound19:20:171
815152994741,4cyclictest3650584-21kworker/u8:0+flush-8:019:25:231
815152994642,3cyclictest966141-21kworker/u8:0+events_unbound21:55:211
815152994642,3cyclictest956722-21kworker/u8:3+flush-8:022:10:211
815152994640,4cyclictest1122978-21kworker/u8:1+flush-8:000:15:201
815148994642,3cyclictest950332-21kworker/u8:2+flush-8:022:40:230
815148994641,3cyclictest950332-21kworker/u8:2+events_unbound22:05:210
815148994640,4cyclictest3650584-21kworker/u8:0+events_unbound20:05:170
10783452460,3sleep375-21kworker/3:1+events23:30:113
815152994541,3cyclictest950332-21kworker/u8:2+events_unbound23:15:221
815152994541,3cyclictest1090106-21kworker/u8:3+events_unbound00:00:151
815152994540,4cyclictest905738-21kworker/u8:3+events_unbound21:15:091
815148994540,3cyclictest956722-21kworker/u8:3+flush-8:022:50:210
815148994540,3cyclictest1101738-21kworker/u8:2+flush-8:000:10:180
8951572440,5sleep20-21swapper/220:25:132
815152994439,4cyclictest950332-21kworker/u8:2+events_unbound21:45:201
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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