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2025-08-27 - 14:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by a total of 3616 SMIs that occured during the measurement.
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack6slot4.osadl.org (updated Wed Aug 27, 2025 13:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
"interval":200,6448
"cycles":100000000,6447
"load":"idle",6446
"condition":{6445
"clock":"1100"6443
"family":"x86",6442
"vendor":"Intel",6441
"processor":{6439
"dataset":"2024-01-08T03:36:49+01:00"6437
"origin":"2024-01-08T00:43:22+01:00",6436
"timestamps":{6435
"granularity":"microseconds"6433
32409:38:396431
331,09:33:156430
"maxima":[6429
009:33:156426
0,09:33:156425
0,09:33:156424
0,09:33:156423
0,09:33:156422
0,09:33:156421
0,09:33:156420
0,09:33:156419
0,09:33:156418
0,09:33:156417
0,09:33:156416
0,09:33:156415
0,09:33:156414
0,09:33:156413
0,09:33:156412
0,09:33:156411
0,09:33:156410
0,09:33:156409
0,09:33:156408
0,09:33:156407
0,09:33:156406
0,09:33:156405
0,09:33:156404
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0,09:33:156402
0,09:33:156401
0,09:33:156400
0,09:33:156399
0,09:33:156398
0,09:33:156397
0,09:33:156396
0,09:33:156395
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0,09:33:156393
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0,09:33:156389
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0,09:33:156386
0,09:33:156385
0,09:33:156384
0,09:33:156383
0,09:33:156382
0,09:33:156381
0,09:33:156380
0,09:33:156379
0,09:33:156378
0,09:33:156377
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0,09:33:156375
0,09:33:156374
0,09:33:156373
0,09:33:156372
0,09:33:156371
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0,09:33:156369
0,09:33:156368
0,09:33:156367
0,09:33:156366
0,09:33:156365
0,09:33:156364
0,09:33:156363
0,09:33:156362
0,09:33:156361
0,09:33:156360
0,09:33:156359
0,09:33:156358
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0,09:33:156356
0,09:33:156355
0,09:33:156354
0,09:33:156353
0,09:33:156352
1,09:33:156351
0,09:33:156350
0,09:33:156349
1,09:33:156348
0,09:33:156347
1,09:33:156346
0,09:33:156345
1,09:33:156344
2,09:33:156343
1,09:33:156342
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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