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2025-12-07 - 21:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot0.osadl.org (updated Sun Dec 07, 2025 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
117950660,0irq/26-eth1-rx-0-21swapper/107:08:001
110050600,0irq/25-eth00-21swapper/307:08:553
110050560,0irq/25-eth00-21swapper/207:08:072
117950410,0irq/26-eth1-rx-0-21swapper/007:05:270
245599171,0cyclictest0-21swapper/111:57:391
2456991615,0cyclictest0-21swapper/209:54:072
2455991612,0cyclictest0-21swapper/110:40:311
245499161,0cyclictest7297-21needreboot10:25:250
245499160,0cyclictest0-21swapper/009:40:100
110050160,0irq/25-eth018793-21bash09:34:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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