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2026-01-14 - 04:51
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Wed Jan 14, 2026 00:43:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120650600,0irq/26-eth1-rx-0-21swapper/319:08:543
112750590,0irq/25-eth00-21swapper/119:07:081
112750470,0irq/25-eth00-21swapper/219:05:092
120650420,0irq/26-eth1-rx-0-21swapper/019:08:020
13814991413,0cyclictest0-21swapper/322:58:293
13813991413,0cyclictest0-21swapper/223:36:592
13812991413,0cyclictest0-21swapper/122:25:151
1381199140,0cyclictest0-21swapper/021:46:270
351130,0ktimersoftd/30-21swapper/322:14:433
13814991312,0cyclictest0-21swapper/323:25:553
13814991312,0cyclictest0-21swapper/322:42:213
13814991312,0cyclictest0-21swapper/322:42:203
13814991310,0cyclictest0-21swapper/322:17:503
1381499130,0cyclictest0-21swapper/323:03:093
1381499130,0cyclictest0-21swapper/300:20:303
1381499130,0cyclictest0-21swapper/300:09:153
13813991311,0cyclictest5845-21diskmemload21:18:172
13813991311,0cyclictest0-21swapper/222:54:572
13813991311,0cyclictest0-21swapper/222:54:562
1381399130,0cyclictest26096-21bash23:44:052
1381399130,0cyclictest0-21swapper/221:58:212
1381399130,0cyclictest0-21swapper/200:04:522
13812991312,0cyclictest0-21swapper/122:07:351
13812991312,0cyclictest0-21swapper/100:04:341
1381299130,0cyclictest5845-21diskmemload23:25:111
1381299130,0cyclictest18267-21sshd21:23:051
1381299130,0cyclictest0-21swapper/123:36:541
1381299130,0cyclictest0-21swapper/123:04:371
1381299130,0cyclictest0-21swapper/122:34:041
1381299130,0cyclictest0-21swapper/122:01:331
1381299130,0cyclictest0-21swapper/121:43:321
1381299130,0cyclictest0-21swapper/100:16:041
13811991312,0cyclictest0-21swapper/023:54:420
1381199130,0cyclictest0-21swapper/023:15:200
112750130,0irq/25-eth00-21swapper/123:55:581
351120,0ktimersoftd/30-21swapper/323:06:373
191120,0ktimersoftd/10-21swapper/123:50:381
191120,0ktimersoftd/10-21swapper/100:27:061
13814991211,0cyclictest15504-21bash21:55:423
13814991211,0cyclictest0-21swapper/321:18:493
13814991210,0cyclictest0-21swapper/322:49:123
13814991210,0cyclictest0-21swapper/321:38:493
13814991210,0cyclictest0-21swapper/300:02:233
1381499120,0cyclictest27991-21sshd21:52:233
13813991212,0cyclictest0-21swapper/223:55:342
13813991211,0cyclictest30838-21sshd21:47:192
1381399120,0cyclictest0-21swapper/223:48:422
1381399120,0cyclictest0-21swapper/223:23:022
1381399120,0cyclictest0-21swapper/222:47:512
1381399120,0cyclictest0-21swapper/222:29:162
1381399120,0cyclictest0-21swapper/200:35:232
1381399120,0cyclictest0-21swapper/200:11:422
13812991212,0cyclictest0-21swapper/122:11:591
13812991211,0cyclictest5086-21kworker/1:022:38:431
13812991211,0cyclictest0-21swapper/123:18:201
13812991211,0cyclictest0-21swapper/123:11:281
13812991211,0cyclictest0-21swapper/122:52:541
13812991211,0cyclictest0-21swapper/122:52:531
13812991211,0cyclictest0-21swapper/122:18:381
13812991211,0cyclictest0-21swapper/121:54:211
13812991211,0cyclictest0-21swapper/121:16:561
13812991211,0cyclictest0-21swapper/119:35:231
13812991211,0cyclictest0-21swapper/100:20:291
13812991211,0cyclictest0-21swapper/100:11:241
1381299120,0cyclictest9633-21sshd00:09:131
1381299120,0cyclictest0-21swapper/123:09:161
1381299120,0cyclictest0-21swapper/121:25:051
13811991211,0cyclictest30275-21id22:26:120
13811991211,0cyclictest0-21swapper/023:40:460
13811991211,0cyclictest0-21swapper/023:10:400
13811991211,0cyclictest0-21swapper/022:08:310
13811991211,0cyclictest0-21swapper/000:28:590
1381199120,0cyclictest5845-21diskmemload23:01:220
1381199120,0cyclictest5845-21diskmemload00:10:500
1381199120,0cyclictest30727-21sshd22:04:060
1381199120,0cyclictest0-21swapper/023:22:110
1381199120,0cyclictest0-21swapper/022:54:180
1381199120,0cyclictest0-21swapper/022:54:170
1381199120,0cyclictest0-21swapper/022:47:130
1381199120,0cyclictest0-21swapper/022:32:480
1381199120,0cyclictest0-21swapper/021:17:240
1381199120,0cyclictest0-21swapper/000:35:210
1381199120,0cyclictest0-21swapper/000:33:370
271110,0ktimersoftd/20-21swapper/222:44:562
271110,0ktimersoftd/20-21swapper/222:44:562
13814991111,0cyclictest0-21swapper/322:26:263
13814991111,0cyclictest0-21swapper/300:36:123
13814991110,0cyclictest29863-21bash21:41:343
13814991110,0cyclictest24376-21bash21:13:033
13814991110,0cyclictest23045-21bash22:30:273
13814991110,0cyclictest14567-21sshd00:32:283
13814991110,0cyclictest0-21swapper/322:35:163
13814991110,0cyclictest0-21swapper/322:24:133
13814991110,0cyclictest0-21swapper/321:20:173
1381499110,0cyclictest0-21swapper/322:05:403
1381499110,0cyclictest0-21swapper/319:16:443
13813991111,0cyclictest0-21swapper/222:59:342
13813991111,0cyclictest0-21swapper/222:00:352
13813991111,0cyclictest0-21swapper/221:24:262
13813991111,0cyclictest0-21swapper/220:52:362
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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