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2026-01-30 - 23:01
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Fri Jan 30, 2026 12:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
112750650,0irq/25-eth00-21swapper/107:05:221
120650590,0irq/26-eth1-rx-0-21swapper/307:05:483
843124924,0sleep00-21swapper/007:06:230
112750400,0irq/25-eth00-21swapper/207:07:342
8795991413,0cyclictest0-21swapper/312:01:193
8794991412,0cyclictest0-21swapper/211:03:112
879499140,0cyclictest0-21swapper/210:20:122
8793991413,0cyclictest0-21swapper/111:46:361
8795991312,0cyclictest0-21swapper/312:18:033
8795991312,0cyclictest0-21swapper/310:35:413
879599130,0cyclictest0-21swapper/311:14:233
8794991312,0cyclictest6259-21bash10:19:092
8794991312,0cyclictest0-21swapper/211:12:292
8794991311,0cyclictest0-21swapper/212:38:402
879499130,0cyclictest0-21swapper/209:29:542
879499130,0cyclictest0-21swapper/209:11:322
8793991312,0cyclictest778-21diskmemload12:01:501
8793991312,0cyclictest0-21swapper/109:57:591
879399130,0cyclictest0-21swapper/110:11:341
879399130,0cyclictest0-21swapper/108:05:531
8792991312,0cyclictest0-21swapper/011:19:360
8792991312,0cyclictest0-21swapper/010:03:380
879299131,0cyclictest0-21swapper/011:45:360
879299130,0cyclictest0-21swapper/012:03:170
879299130,0cyclictest0-21swapper/011:56:380
351130,0ktimersoftd/30-21swapper/309:43:323
191130,0ktimersoftd/10-21swapper/110:50:301
112750130,0irq/25-eth028430-21sshd10:07:441
112750130,0irq/25-eth025359-21id10:31:401
112750130,0irq/25-eth00-21swapper/312:20:293
112750130,0irq/25-eth00-21swapper/309:19:573
112750130,0irq/25-eth00-21swapper/309:19:573
8795991211,0cyclictest6048-21sshd10:09:193
8795991211,0cyclictest17850-21sshd09:31:553
8795991211,0cyclictest12140-21munin-run08:25:003
8795991211,0cyclictest0-21swapper/311:33:183
8795991211,0cyclictest0-21swapper/310:28:503
8795991211,0cyclictest0-21swapper/310:01:183
8795991210,0cyclictest0-21swapper/311:07:453
8795991210,0cyclictest0-21swapper/310:44:453
8795991210,0cyclictest0-21swapper/308:25:143
879599120,0cyclictest0-21swapper/312:32:483
879599120,0cyclictest0-21swapper/312:11:533
879599120,0cyclictest0-21swapper/308:15:203
8794991211,0cyclictest31462-21bash10:08:142
8794991211,0cyclictest26921-21bash11:21:042
8794991211,0cyclictest0-21swapper/212:06:432
8794991211,0cyclictest0-21swapper/211:44:522
8794991211,0cyclictest0-21swapper/208:30:102
8794991210,0cyclictest0-21swapper/212:30:052
879499120,0cyclictest1995-21sshd10:28:122
879499120,0cyclictest0-21swapper/209:38:222
879499120,0cyclictest0-21swapper/209:23:512
879499120,0cyclictest0-21swapper/209:17:492
879499120,0cyclictest0-21swapper/209:17:492
879499120,0cyclictest0-21swapper/208:15:122
8793991212,0cyclictest0-21swapper/107:55:111
8793991211,0cyclictest778-21diskmemload09:21:381
8793991211,0cyclictest0-21swapper/111:44:231
8793991210,0cyclictest12574-21sshd12:08:121
879399120,0cyclictest32713-21sshd12:35:451
879399120,0cyclictest0-21swapper/110:24:001
879399120,0cyclictest0-21swapper/109:15:351
879399120,0cyclictest0-21swapper/109:15:351
879399120,0cyclictest0-21swapper/107:15:141
8792991211,0cyclictest25919-21bash09:52:420
8792991211,0cyclictest0-21swapper/011:30:230
8792991211,0cyclictest0-21swapper/010:19:530
879299120,0cyclictest778-21diskmemload12:13:500
879299120,0cyclictest0-21swapper/010:31:230
879299120,0cyclictest0-21swapper/009:18:330
879299120,0cyclictest0-21swapper/009:18:330
41120,0ktimersoftd/00-21swapper/012:20:330
8795991111,0cyclictest0-21swapper/312:36:593
8795991111,0cyclictest0-21swapper/311:46:063
8795991111,0cyclictest0-21swapper/311:18:333
8795991111,0cyclictest0-21swapper/310:12:003
8795991110,0cyclictest26821-21cp09:47:583
8795991110,0cyclictest0-21swapper/310:51:223
8795991110,0cyclictest0-21swapper/309:29:013
8795991110,0cyclictest0-21swapper/309:14:023
879599110,0cyclictest0-21swapper/312:07:413
879599110,0cyclictest0-21swapper/308:58:423
8794991111,0cyclictest0-21swapper/211:34:042
8794991111,0cyclictest0-21swapper/210:56:052
8794991111,0cyclictest0-21swapper/207:15:222
8794991110,0cyclictest5924-21bash09:54:382
8794991110,0cyclictest30988-21sshd09:43:432
8794991110,0cyclictest0-21swapper/212:21:282
879499110,0cyclictest0-21swapper/212:17:182
879499110,0cyclictest0-21swapper/209:49:352
8793991111,0cyclictest0-21swapper/111:35:491
8793991111,0cyclictest0-21swapper/109:36:241
8793991110,0cyclictest25391-21sshd11:20:481
8793991110,0cyclictest21817-21sshd09:27:401
8793991110,0cyclictest17202-21sshd12:33:321
8793991110,0cyclictest0-21swapper/111:29:251
8793991110,0cyclictest0-21swapper/111:00:441
8793991110,0cyclictest0-21swapper/110:44:341
879399110,0cyclictest0-21swapper/108:38:041
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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