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2025-10-30 - 23:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rack7slot0.osadl.org (updated Thu Oct 30, 2025 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
110050610,0irq/25-eth00-21swapper/107:05:441
110050600,0irq/25-eth00-21swapper/307:06:463
117950590,0irq/26-eth1-rx-0-21swapper/007:07:590
349125231,0sleep20-21swapper/207:09:142
362499180,0cyclictest30492-21sshd12:25:072
271180,0ktimersoftd/28061-21sshd10:00:572
362499160,0cyclictest0-21swapper/211:55:142
271160,0ktimersoftd/217820-21bash09:20:112
3625991512,0cyclictest0-21swapper/312:33:183
110050150,0irq/25-eth00-21swapper/011:00:400
362599140,0cyclictest6324-21sshd12:03:213
3624991413,0cyclictest0-21swapper/211:31:472
3624991413,0cyclictest0-21swapper/209:14:432
362499140,0cyclictest0-21swapper/208:45:222
3623991413,0cyclictest27957-21diskmemload11:50:581
3623991413,0cyclictest0-21swapper/109:26:541
3623991411,0cyclictest0-21swapper/110:07:271
362399140,0cyclictest0-21swapper/109:32:431
362299140,0cyclictest27957-21diskmemload09:21:070
362299140,0cyclictest0-21swapper/009:48:530
110050140,0irq/25-eth02558-21sshd12:37:252
41130,0ktimersoftd/00-21swapper/009:34:410
3625991312,0cyclictest25623-21sshd11:00:513
3625991312,0cyclictest0-21swapper/312:11:563
3625991312,0cyclictest0-21swapper/309:18:373
362599130,0cyclictest0-21swapper/312:16:223
362599130,0cyclictest0-21swapper/311:36:453
362599130,0cyclictest0-21swapper/311:30:283
362599130,0cyclictest0-21swapper/309:42:543
362599130,0cyclictest0-21swapper/309:20:223
3624991312,0cyclictest0-21swapper/211:11:002
3624991312,0cyclictest0-21swapper/210:35:552
3624991311,0cyclictest0-21swapper/211:38:042
3623991312,0cyclictest0-21swapper/109:24:361
3623991311,0cyclictest0-21swapper/110:21:091
362399130,0cyclictest0-21swapper/112:18:021
362399130,0cyclictest0-21swapper/109:40:301
3622991313,0cyclictest110050irq/25-eth011:54:270
3622991312,0cyclictest0-21swapper/012:21:520
3622991312,0cyclictest0-21swapper/010:06:240
3622991311,0cyclictest30097-21taskset11:40:580
362299130,0cyclictest0-21swapper/009:15:520
110050130,0irq/25-eth00-21swapper/209:34:082
110050130,0irq/25-eth00-21swapper/010:12:120
3625991212,0cyclictest0-21swapper/310:00:053
3625991211,0cyclictest0-21swapper/312:37:503
3625991211,0cyclictest0-21swapper/310:21:503
3625991211,0cyclictest0-21swapper/308:25:393
3625991211,0cyclictest0-21swapper/307:14:263
3625991210,0cyclictest19580-21sshd11:18:303
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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