You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-11 - 06:30
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Tue Aug 11, 2026 00:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
112750690,0irq/25-eth00-21swapper/319:05:013
112750630,0irq/25-eth00-21swapper/119:05:391
112750610,0irq/25-eth00-21swapper/219:05:212
1159924826,0sleep00-21swapper/019:05:240
1203999190,0cyclictest535-21sshd23:00:160
351180,0ktimersoftd/325785-21sshd00:01:113
271180,0ktimersoftd/225358-21sshd22:22:172
271180,0ktimersoftd/215289-21sshd21:56:222
1204299180,0cyclictest24143-21cat20:40:213
271170,0ktimersoftd/218116-21id21:52:392
1204299160,0cyclictest0-21swapper/322:55:203
1204299140,0cyclictest15820-21sshd23:35:123
12040991413,0cyclictest32435-21bash22:10:481
12040991413,0cyclictest0-21swapper/123:44:101
12040991413,0cyclictest0-21swapper/123:20:151
1203999140,0cyclictest0-21swapper/022:59:070
1203999140,0cyclictest0-21swapper/021:26:250
9950130,0irq/24-0000:00:0-21swapper/123:11:541
9950130,0irq/24-0000:00:0-21swapper/123:11:531
41130,0ktimersoftd/026417-21sshd00:17:540
12042991312,0cyclictest0-21swapper/323:53:053
12042991312,0cyclictest0-21swapper/322:52:203
12042991312,0cyclictest0-21swapper/322:32:423
12042991312,0cyclictest0-21swapper/300:33:443
12042991311,0cyclictest0-21swapper/321:10:003
1204299130,0cyclictest0-21swapper/322:35:163
1204299130,0cyclictest0-21swapper/321:29:313
1204299130,0cyclictest0-21swapper/321:15:273
12041991311,0cyclictest20361-21sshd21:48:532
12041991310,0cyclictest0-21swapper/222:14:392
1204199130,0cyclictest0-21swapper/223:12:032
1204199130,0cyclictest0-21swapper/223:12:022
1204199130,0cyclictest0-21swapper/222:47:542
12040991312,0cyclictest9319-21sshd22:53:111
12040991312,0cyclictest7089-21bash00:19:371
12040991312,0cyclictest0-21swapper/100:09:231
12039991312,0cyclictest6387-21sshd22:24:020
12039991312,0cyclictest3951-21diskmemload23:57:260
12039991312,0cyclictest13225-21memory19:10:170
12039991312,0cyclictest0-21swapper/000:36:290
12039991311,0cyclictest3951-21diskmemload23:51:240
12039991311,0cyclictest0-21swapper/021:51:100
12039991311,0cyclictest0-21swapper/021:16:330
112750130,0irq/25-eth00-21swapper/321:39:163
9950120,0irq/24-0000:00:4030-21sshd22:19:380
41120,0ktimersoftd/00-21swapper/023:44:040
12042991211,0cyclictest8047-21users00:15:233
12042991211,0cyclictest0-21swapper/323:05:143
12042991211,0cyclictest0-21swapper/321:30:333
12042991211,0cyclictest0-21swapper/321:21:583
12042991211,0cyclictest0-21swapper/300:05:113
12042991210,0cyclictest0-21swapper/323:01:173
1204299120,0cyclictest0-21swapper/323:31:163
1204299120,0cyclictest0-21swapper/323:27:193
1204299120,0cyclictest0-21swapper/323:27:183
1204299120,0cyclictest0-21swapper/323:22:193
12041991212,0cyclictest0-21swapper/222:59:582
12041991212,0cyclictest0-21swapper/222:16:452
12041991211,0cyclictest0-21swapper/223:46:132
12041991211,0cyclictest0-21swapper/222:37:262
12041991211,0cyclictest0-21swapper/222:33:152
12041991211,0cyclictest0-21swapper/222:08:092
12041991211,0cyclictest0-21swapper/221:38:112
12041991210,0cyclictest0-21swapper/223:31:132
12041991210,0cyclictest0-21swapper/200:10:362
1204199120,0cyclictest31719-21bash22:43:422
1204199120,0cyclictest0-21swapper/200:26:032
12040991211,0cyclictest16333-21sshd23:35:151
12040991211,0cyclictest0-21swapper/121:50:271
12040991210,0cyclictest0-21swapper/123:26:181
12040991210,0cyclictest0-21swapper/123:26:171
1204099120,0cyclictest16602-21sshd00:20:401
1204099120,0cyclictest11582-21sshd22:00:051
1204099120,0cyclictest0-21swapper/123:54:101
1204099120,0cyclictest0-21swapper/123:00:201
1204099120,0cyclictest0-21swapper/122:36:421
1204099120,0cyclictest0-21swapper/121:48:211
1204099120,0cyclictest0-21swapper/121:36:381
1204099120,0cyclictest0-21swapper/121:29:051
12039991211,0cyclictest1513-21sshd23:29:200
12039991211,0cyclictest1513-21sshd23:29:190
12039991211,0cyclictest0-21swapper/023:10:100
12039991211,0cyclictest0-21swapper/023:10:090
12039991211,0cyclictest0-21swapper/000:07:390
12039991210,0cyclictest8526-21sshd22:53:050
12039991210,0cyclictest0-21swapper/022:01:510
1203999120,0cyclictest0-21swapper/023:24:190
1203999120,0cyclictest0-21swapper/022:25:060
1203999120,0cyclictest0-21swapper/021:39:270
1203999120,0cyclictest0-21swapper/021:20:580
1203999120,0cyclictest0-21swapper/020:00:210
112750120,0irq/25-eth018-21rcuc/121:31:401
112750120,0irq/25-eth00-21swapper/123:07:421
112750120,0irq/25-eth00-21swapper/122:31:481
112750120,0irq/25-eth00-21swapper/122:15:461
112750120,0irq/25-eth00-21swapper/100:26:071
351110,0ktimersoftd/30-21swapper/323:44:303
351110,0ktimersoftd/30-21swapper/321:12:493
191110,0ktimersoftd/10-21swapper/123:19:201
191110,0ktimersoftd/10-21swapper/123:19:191
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional