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2026-01-11 - 15:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Sun Jan 11, 2026 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
112750640,0irq/25-eth00-21swapper/107:09:181
120650630,0irq/26-eth1-rx-0-21swapper/307:09:183
120650460,0irq/26-eth1-rx-0-21swapper/007:07:220
2733924321,0sleep20-21swapper/207:07:412
2759799191,0cyclictest17842-21date12:00:232
2759699190,0cyclictest22882-21sshd09:21:201
27596991514,0cyclictest0-21swapper/109:54:161
27595991514,0cyclictest0-21swapper/011:02:000
2759899140,0cyclictest0-21swapper/311:26:483
2759899140,0cyclictest0-21swapper/307:15:003
2759799141,0cyclictest23007-21sshd10:05:162
2759799140,0cyclictest0-21swapper/211:54:392
27596991413,0cyclictest32206-21bash12:14:141
27596991413,0cyclictest18679-21sshd11:27:121
2759599140,0cyclictest29863-21sshd09:11:310
41130,0ktimersoftd/00-21swapper/009:49:030
27598991312,0cyclictest7622-21rm12:10:023
27598991312,0cyclictest5332-21sshd09:24:003
27598991312,0cyclictest0-21swapper/312:03:463
27598991311,0cyclictest27488-21sshd10:50:063
2759899130,0cyclictest0-21swapper/310:37:473
27597991311,0cyclictest0-21swapper/210:39:232
2759799130,0cyclictest0-21swapper/211:41:522
2759799130,0cyclictest0-21swapper/209:28:452
27596991312,0cyclictest0-21swapper/112:17:231
2759699130,0cyclictest19638-21diskmemload09:10:201
27595991312,0cyclictest0-21swapper/012:39:560
27595991312,0cyclictest0-21swapper/012:20:250
27595991312,0cyclictest0-21swapper/011:41:510
27595991312,0cyclictest0-21swapper/011:26:240
27595991312,0cyclictest0-21swapper/010:14:580
112750130,0irq/25-eth00-21swapper/112:02:441
351120,0ktimersoftd/34901-21sshd12:09:333
27598991211,0cyclictest23458-21bash10:10:433
27598991211,0cyclictest0-21swapper/311:57:283
27598991211,0cyclictest0-21swapper/311:54:203
27598991210,0cyclictest0-21swapper/312:32:123
27598991210,0cyclictest0-21swapper/310:46:583
2759899120,0cyclictest0-21swapper/311:11:493
2759899120,0cyclictest0-21swapper/311:02:533
2759899120,0cyclictest0-21swapper/309:32:503
2759899120,0cyclictest0-21swapper/309:15:533
2759899120,0cyclictest0-21swapper/308:50:133
27597991210,0cyclictest0-21swapper/210:52:092
2759799120,0cyclictest0-21swapper/211:23:172
2759799120,0cyclictest0-21swapper/210:49:012
2759799120,0cyclictest0-21swapper/210:21:012
27596991212,0cyclictest0-21swapper/110:46:531
27596991211,0cyclictest19638-21diskmemload10:03:541
27596991210,0cyclictest0-21swapper/111:18:011
27596991210,0cyclictest0-21swapper/109:18:431
2759699120,0cyclictest8622-21sshd12:27:021
2759699120,0cyclictest19638-21diskmemload09:31:511
2759699120,0cyclictest0-21swapper/111:33:141
2759699120,0cyclictest0-21swapper/110:37:281
2759699120,0cyclictest0-21swapper/109:41:571
27595991211,0cyclictest19638-21diskmemload11:23:160
27595991210,0cyclictest0-21swapper/009:28:440
2759599120,0cyclictest0-21swapper/010:42:430
112750120,0irq/25-eth029228-21sshd10:22:500
112750120,0irq/25-eth00-21swapper/210:10:192
112750120,0irq/25-eth00-21swapper/110:18:331
41110,0ktimersoftd/014741-21sshd12:16:570
41110,0ktimersoftd/00-21swapper/008:05:250
351110,0ktimersoftd/30-21swapper/309:02:183
27598991111,0cyclictest24928-21sshd12:35:203
27598991111,0cyclictest0-21swapper/311:17:383
27598991111,0cyclictest0-21swapper/310:22:333
27598991110,0cyclictest0-21swapper/311:23:403
27598991110,0cyclictest0-21swapper/310:25:283
2759899110,0cyclictest0-21swapper/310:05:173
2759899110,0cyclictest0-21swapper/309:36:413
2759899110,0cyclictest0-21swapper/308:42:533
2759899110,0cyclictest0-21swapper/308:35:353
2759899110,0cyclictest0-21swapper/308:01:543
2759899110,0cyclictest0-21swapper/307:49:143
2759799119,0cyclictest0-21swapper/207:57:052
27597991111,0cyclictest0-21swapper/212:17:042
27597991111,0cyclictest0-21swapper/211:02:022
27597991111,0cyclictest0-21swapper/210:29:582
27597991110,0cyclictest30461-21sshd11:29:202
27597991110,0cyclictest28056-21sshd10:55:262
27597991110,0cyclictest0-21swapper/210:42:312
27597991110,0cyclictest0-21swapper/209:52:202
2759799110,0cyclictest20480-21sshd11:38:442
27596991111,0cyclictest0-21swapper/111:51:501
27596991111,0cyclictest0-21swapper/111:48:411
27596991111,0cyclictest0-21swapper/109:57:241
27596991111,0cyclictest0-21swapper/107:57:371
27596991110,0cyclictest0-21swapper/110:28:181
27596991110,0cyclictest0-21swapper/109:47:591
2759699110,0cyclictest22705-21sshd10:43:451
2759699110,0cyclictest0-21swapper/111:08:581
2759699110,0cyclictest0-21swapper/110:56:321
2759699110,0cyclictest0-21swapper/107:27:121
27595991111,0cyclictest112750irq/25-eth009:58:490
27595991111,0cyclictest0-21swapper/007:50:200
27595991110,0cyclictest25564-21sshd12:07:240
27595991110,0cyclictest20363-21sshd11:38:430
27595991110,0cyclictest19638-21diskmemload12:26:550
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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