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2026-03-14 - 19:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Sat Mar 14, 2026 12:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120650650,0irq/26-eth1-rx-0-21swapper/307:08:323
112750640,0irq/25-eth00-21swapper/107:05:521
112750610,0irq/25-eth00-21swapper/207:06:252
120650450,0irq/26-eth1-rx-0-21swapper/007:05:510
963499160,0cyclictest0-21swapper/312:25:193
9634991413,0cyclictest0-21swapper/311:39:533
9634991413,0cyclictest0-21swapper/309:30:213
963499140,0cyclictest4847-21sshd10:40:113
963499140,0cyclictest0-21swapper/309:28:223
963499140,0cyclictest0-21swapper/307:10:153
9633991413,0cyclictest0-21swapper/209:33:112
9633991412,0cyclictest1520-21diskmemload10:31:092
963399140,0cyclictest0-21swapper/208:20:152
9632991413,0cyclictest18-21rcuc/111:18:111
9632991412,0cyclictest19978-21sshd09:55:071
9631991413,0cyclictest0-21swapper/010:50:480
9631991413,0cyclictest0-21swapper/010:50:480
112750140,0irq/25-eth00-21swapper/312:00:193
9634991312,0cyclictest0-21swapper/310:37:163
9634991312,0cyclictest0-21swapper/310:18:273
9634991312,0cyclictest0-21swapper/310:00:543
9634991312,0cyclictest0-21swapper/309:48:223
9634991311,0cyclictest0-21swapper/312:37:163
9634991310,0cyclictest0-21swapper/311:01:333
963499130,0cyclictest21782-21sshd09:12:343
963499130,0cyclictest0-21swapper/308:50:173
963399130,0cyclictest0-21swapper/212:26:452
963399130,0cyclictest0-21swapper/211:15:112
963399130,0cyclictest0-21swapper/208:55:122
9632991312,0cyclictest1520-21diskmemload11:43:101
963299130,0cyclictest0-21swapper/112:00:181
9631991312,0cyclictest0-21swapper/012:03:030
963199130,0cyclictest0-21swapper/011:39:140
963199130,0cyclictest0-21swapper/011:17:450
351130,0ktimersoftd/30-21swapper/312:16:143
351130,0ktimersoftd/30-21swapper/312:05:193
112750130,0irq/25-eth00-21swapper/310:21:143
9634991211,0cyclictest0-21swapper/312:10:263
9634991211,0cyclictest0-21swapper/311:26:313
9634991210,0cyclictest7939-21sshd10:57:503
9634991210,0cyclictest7939-21sshd10:57:493
9634991210,0cyclictest0-21swapper/311:30:283
963499120,0cyclictest0-21swapper/309:52:323
9633991211,0cyclictest24159-21sshd09:17:092
9633991211,0cyclictest1520-21diskmemload10:59:372
9633991211,0cyclictest1520-21diskmemload10:59:372
9633991211,0cyclictest0-21swapper/212:06:112
9633991211,0cyclictest0-21swapper/210:44:452
9633991211,0cyclictest0-21swapper/210:19:472
9633991211,0cyclictest0-21swapper/210:12:202
9633991211,0cyclictest0-21swapper/209:27:012
9633991210,0cyclictest9700-21sshd10:02:142
9633991210,0cyclictest0-21swapper/211:44:072
963399120,0cyclictest25733-21sshd11:13:132
963399120,0cyclictest0-21swapper/212:17:202
963399120,0cyclictest0-21swapper/211:38:392
963399120,0cyclictest0-21swapper/210:45:132
963399120,0cyclictest0-21swapper/210:06:382
963399120,0cyclictest0-21swapper/209:55:512
9632991211,0cyclictest1520-21diskmemload12:08:431
9632991211,0cyclictest15113-21kworker/1:109:30:431
9632991211,0cyclictest0-21swapper/112:25:341
9632991211,0cyclictest0-21swapper/110:09:521
9632991211,0cyclictest0-21swapper/109:18:521
9632991210,0cyclictest0-21swapper/110:24:441
9632991210,0cyclictest0-21swapper/109:00:101
963299120,0cyclictest16671-21sshd09:24:491
963299120,0cyclictest0-21swapper/111:20:101
963299120,0cyclictest0-21swapper/110:47:451
9631991211,0cyclictest0-21swapper/011:09:510
9631991210,0cyclictest0-21swapper/011:00:110
963199120,0cyclictest0-21swapper/011:57:350
963199120,0cyclictest0-21swapper/011:44:420
120650120,0irq/26-eth1-rx-0-21swapper/009:00:120
112750120,0irq/25-eth019333-21sshd12:21:441
963499119,0cyclictest0-21swapper/309:00:013
9634991111,0cyclictest0-21swapper/307:25:213
9634991110,0cyclictest6395-21sshd10:14:443
9634991110,0cyclictest23619-21sshd11:12:563
9634991110,0cyclictest0-21swapper/311:57:463
963499110,0cyclictest0-21swapper/308:16:573
963499110,0cyclictest0-21swapper/307:17:203
963399117,0cyclictest8982-21bash12:11:382
9633991111,0cyclictest14215-21sshd11:07:172
9633991111,0cyclictest0-21swapper/207:50:292
9633991111,0cyclictest0-21swapper/207:32:292
9633991110,0cyclictest9201-21sshd11:58:452
9633991110,0cyclictest11034-21sshd12:33:432
9633991110,0cyclictest0-21swapper/211:49:342
963399110,0cyclictest22078-21sshd09:21:072
963399110,0cyclictest0-21swapper/212:00:172
963399110,0cyclictest0-21swapper/210:52:112
963399110,0cyclictest0-21swapper/210:52:102
963399110,0cyclictest0-21swapper/209:50:152
963399110,0cyclictest0-21swapper/209:43:172
9632991111,0cyclictest0-21swapper/111:57:481
9632991111,0cyclictest0-21swapper/110:44:021
9632991111,0cyclictest0-21swapper/109:50:571
9632991110,0cyclictest700-21sshd11:14:131
9632991110,0cyclictest1520-21diskmemload12:31:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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