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2025-12-14 - 20:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Sun Dec 14, 2025 12:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120650650,0irq/26-eth1-rx-0-21swapper/107:08:161
112750590,0irq/25-eth00-21swapper/307:06:533
120650510,0irq/26-eth1-rx-0-21swapper/207:08:482
2880724320,0sleep00-21swapper/007:06:170
2917699160,0cyclictest0-21swapper/209:00:122
29175991514,0cyclictest17107-21awk09:45:171
29176991312,0cyclictest0-21swapper/212:16:582
2917699130,0cyclictest0-21swapper/209:30:132
2917699130,0cyclictest0-21swapper/209:15:032
2917699130,0cyclictest0-21swapper/208:50:162
29175991311,0cyclictest0-21swapper/109:32:511
2917499130,0cyclictest0-21swapper/012:11:190
351120,0ktimersoftd/30-21swapper/312:31:353
351120,0ktimersoftd/30-21swapper/311:34:193
29177991211,0cyclictest0-21swapper/312:36:543
29177991211,0cyclictest0-21swapper/312:06:223
29177991211,0cyclictest0-21swapper/311:09:053
29177991211,0cyclictest0-21swapper/310:42:223
29177991211,0cyclictest0-21swapper/309:45:073
29177991210,0cyclictest25937-21sshd11:39:383
29177991210,0cyclictest0-21swapper/311:57:453
29177991210,0cyclictest0-21swapper/311:17:423
29177991210,0cyclictest0-21swapper/310:37:363
29177991210,0cyclictest0-21swapper/310:15:393
2917799120,0cyclictest0-21swapper/312:18:483
2917799120,0cyclictest0-21swapper/311:53:013
2917799120,0cyclictest0-21swapper/311:04:193
2917799120,0cyclictest0-21swapper/310:07:033
2917799120,0cyclictest0-21swapper/309:26:593
29176991212,0cyclictest0-21swapper/210:50:462
29176991211,0cyclictest24583-21sshd09:11:132
29176991211,0cyclictest0-21swapper/210:46:572
29176991210,0cyclictest0-21swapper/210:18:142
29176991210,0cyclictest0-21swapper/209:42:492
2917699120,0cyclictest0-21swapper/212:24:382
2917699120,0cyclictest0-21swapper/211:41:332
2917699120,0cyclictest0-21swapper/211:02:172
2917699120,0cyclictest0-21swapper/210:22:042
2917699120,0cyclictest0-21swapper/209:50:102
2917699120,0cyclictest0-21swapper/208:45:122
29175991212,0cyclictest0-21swapper/112:35:341
29175991211,0cyclictest21084-21diskmemload09:20:251
29175991211,0cyclictest0-21swapper/111:15:111
29175991211,0cyclictest0-21swapper/111:02:461
29175991211,0cyclictest0-21swapper/110:05:221
29175991210,0cyclictest0-21swapper/111:55:241
2917599120,0cyclictest21084-21diskmemload10:54:101
2917599120,0cyclictest0-21swapper/111:31:281
2917599120,0cyclictest0-21swapper/109:36:411
2917499120,0cyclictest21084-21diskmemload09:12:040
2917499120,0cyclictest0-21swapper/012:34:190
2917499120,0cyclictest0-21swapper/012:15:080
271120,0ktimersoftd/20-21swapper/209:24:552
191120,0ktimersoftd/126375-21sshd12:34:051
41110,0ktimersoftd/00-21swapper/009:26:570
351110,0ktimersoftd/30-21swapper/309:39:453
29177991111,0cyclictest0-21swapper/311:26:173
29177991110,0cyclictest0-21swapper/311:49:103
29177991110,0cyclictest0-21swapper/308:23:403
2917799110,0cyclictest0-21swapper/311:12:563
2917799110,0cyclictest0-21swapper/311:12:553
2917799110,0cyclictest0-21swapper/309:02:073
2917799110,0cyclictest0-21swapper/308:40:593
2917799110,0cyclictest0-21swapper/308:19:503
2917799110,0cyclictest0-21swapper/307:55:483
2917799110,0cyclictest0-21swapper/307:10:353
2917699115,0cyclictest0-21swapper/212:39:132
2917699115,0cyclictest0-21swapper/212:00:252
2917699115,0cyclictest0-21swapper/210:29:452
2917699115,0cyclictest0-21swapper/210:11:402
2917699115,0cyclictest0-21swapper/207:58:012
29176991111,0cyclictest19472-21sshd09:46:392
29176991111,0cyclictest0-21swapper/210:30:402
29176991110,0cyclictest0-21swapper/211:53:572
29176991110,0cyclictest0-21swapper/209:38:592
29176991110,0cyclictest0-21swapper/208:04:382
2917699110,0cyclictest0-21swapper/211:06:062
2917699110,0cyclictest0-21swapper/208:32:392
2917699110,0cyclictest0-21swapper/207:10:382
29175991111,0cyclictest0-21swapper/112:19:181
29175991111,0cyclictest0-21swapper/111:43:531
29175991111,0cyclictest0-21swapper/111:23:481
29175991111,0cyclictest0-21swapper/111:06:351
29175991111,0cyclictest0-21swapper/110:41:441
29175991110,0cyclictest26594-21bash09:12:451
29175991110,0cyclictest21084-21diskmemload12:11:381
2917599110,0cyclictest0-21swapper/110:13:021
2917599110,0cyclictest0-21swapper/108:18:511
2917599110,0cyclictest0-21swapper/107:27:431
2917599110,0cyclictest0-21swapper/107:18:061
2917599110,0cyclictest0-21swapper/107:11:221
2917499110,0cyclictest21084-21diskmemload10:05:440
2917499110,0cyclictest0-21swapper/008:50:150
2917499110,0cyclictest0-21swapper/008:20:140
271110,0ktimersoftd/20-21swapper/210:55:522
112750110,0irq/25-eth019682-21cstates10:25:120
112750110,0irq/25-eth00-21swapper/211:12:512
112750110,0irq/25-eth00-21swapper/211:12:502
112750110,0irq/25-eth00-21swapper/210:40:262
351100,0ktimersoftd/30-21swapper/311:43:503
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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