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2026-04-03 - 16:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Fri Apr 03, 2026 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
112750640,0irq/25-eth0351ktimersoftd/307:08:483
112750640,0irq/25-eth00-21swapper/107:06:301
120650460,0irq/26-eth1-rx-0-21swapper/207:06:502
3207023521,0sleep00-21swapper/007:05:470
32479991413,0cyclictest0-21swapper/311:34:313
32478991413,0cyclictest8-21rcu_preempt11:03:122
32478991411,0cyclictest0-21swapper/209:33:182
3247799140,0cyclictest31617-21sshd09:27:491
3247699140,0cyclictest0-21swapper/010:11:420
112750140,0irq/25-eth00-21swapper/310:58:013
351130,0ktimersoftd/30-21swapper/309:40:123
351130,0ktimersoftd/30-21swapper/309:40:123
3247999130,0cyclictest2036-21sshd09:33:543
32478991312,0cyclictest0-21swapper/208:30:122
32477991313,0cyclictest18-21rcuc/111:39:531
32477991312,0cyclictest20-21ksoftirqd/111:02:501
32477991312,0cyclictest0-21swapper/110:35:181
32477991312,0cyclictest0-21swapper/110:16:011
32477991310,0cyclictest9132-21sshd10:59:081
32477991310,0cyclictest17142-21sshd10:10:061
3247799130,0cyclictest0-21swapper/109:38:021
32476991312,0cyclictest7843-21sshd09:34:590
32476991311,0cyclictest24406-21diskmemload11:43:280
32479991212,0cyclictest0-21swapper/307:50:103
32479991210,0cyclictest12058-21sshd11:44:303
32479991210,0cyclictest0-21swapper/310:03:193
3247999120,0cyclictest3896-21sshd09:56:273
3247999120,0cyclictest0-21swapper/312:10:583
3247999120,0cyclictest0-21swapper/310:37:073
3247999120,0cyclictest0-21swapper/310:31:393
3247999120,0cyclictest0-21swapper/310:22:153
3247999120,0cyclictest0-21swapper/309:25:543
32478991211,0cyclictest12558-21cp10:20:202
32478991211,0cyclictest0-21swapper/212:39:232
32478991211,0cyclictest0-21swapper/212:13:572
32478991210,0cyclictest0-21swapper/212:18:562
32478991210,0cyclictest0-21swapper/209:25:032
3247899120,0cyclictest6034-21sshd12:05:432
3247899120,0cyclictest0-21swapper/210:30:132
3247899120,0cyclictest0-21swapper/209:51:382
3247899120,0cyclictest0-21swapper/209:42:352
3247899120,0cyclictest0-21swapper/209:42:352
32477991212,0cyclictest0-21swapper/111:20:101
32477991211,0cyclictest0-21swapper/112:26:351
32477991211,0cyclictest0-21swapper/111:08:321
32477991211,0cyclictest0-21swapper/110:44:291
32477991211,0cyclictest0-21swapper/110:05:271
32477991211,0cyclictest0-21swapper/107:49:591
32477991210,0cyclictest0-21swapper/109:16:541
3247799120,0cyclictest28916-21sshd11:41:381
3247799120,0cyclictest0-21swapper/110:24:091
3247799120,0cyclictest0-21swapper/110:00:481
32476991211,0cyclictest0-21swapper/012:26:540
32476991211,0cyclictest0-21swapper/010:55:160
32476991211,0cyclictest0-21swapper/010:23:460
32476991210,0cyclictest0-21swapper/012:21:560
3247699120,0cyclictest11654-21bash10:31:270
3247699120,0cyclictest0-21swapper/012:16:550
3247699120,0cyclictest0-21swapper/012:11:560
3247699120,0cyclictest0-21swapper/011:06:380
3247699120,0cyclictest0-21swapper/010:00:120
3247699120,0cyclictest0-21swapper/009:50:540
112750120,0irq/25-eth00-21swapper/310:52:553
41110,0ktimersoftd/024406-21diskmemload09:19:460
351110,0ktimersoftd/30-21swapper/309:37:593
3247999119,0cyclictest0-21swapper/308:31:243
32479991111,0cyclictest0-21swapper/312:27:283
32479991111,0cyclictest0-21swapper/312:17:303
32479991111,0cyclictest0-21swapper/310:42:343
32479991111,0cyclictest0-21swapper/309:12:193
32479991110,0cyclictest9922-21bash11:21:293
32479991110,0cyclictest19869-21sshd11:06:243
32479991110,0cyclictest0-21swapper/310:07:573
32479991110,0cyclictest0-21swapper/308:15:593
3247999110,0cyclictest24406-21diskmemload10:46:173
3247999110,0cyclictest23150-21sshd09:15:133
3247999110,0cyclictest0-21swapper/311:39:293
3247999110,0cyclictest0-21swapper/309:09:383
3247999110,0cyclictest0-21swapper/307:19:303
32478991111,0cyclictest3211-21sshd10:41:092
32478991111,0cyclictest0-21swapper/210:55:462
32478991110,0cyclictest24768-21sshd10:05:352
32478991110,0cyclictest0-21swapper/212:30:412
32478991110,0cyclictest0-21swapper/211:10:522
3247899110,0cyclictest0-21swapper/212:02:272
3247899110,0cyclictest0-21swapper/211:05:122
3247899110,0cyclictest0-21swapper/207:40:122
32477991111,0cyclictest191ktimersoftd/111:18:101
32477991110,0cyclictest0-21swapper/112:33:201
32477991110,0cyclictest0-21swapper/112:00:061
32477991110,0cyclictest0-21swapper/111:46:391
3247799110,0cyclictest0-21swapper/112:21:361
3247799110,0cyclictest0-21swapper/112:11:371
3247799110,0cyclictest0-21swapper/108:42:031
3247799110,0cyclictest0-21swapper/108:32:381
3247799110,0cyclictest0-21swapper/108:00:351
32476991111,0cyclictest0-21swapper/012:06:550
3247699111,0cyclictest0-21swapper/011:03:060
32476991110,0cyclictest22913-21sshd11:18:150
32476991110,0cyclictest0-21swapper/011:57:110
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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