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2026-05-27 - 20:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Wed May 27, 2026 12:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120650650,0irq/26-eth1-rx-0-21swapper/107:05:011
120650600,0irq/26-eth1-rx-0-21swapper/307:08:263
112750550,0irq/25-eth00-21swapper/207:09:322
691924621,0sleep00-21swapper/007:06:330
351180,0ktimersoftd/328688-21sshd10:00:563
351180,0ktimersoftd/321725-21sshd12:00:443
271180,0ktimersoftd/225739-21sshd12:10:052
7269991716,0cyclictest0-21swapper/311:58:193
7266991615,0cyclictest0-21swapper/012:15:140
726899150,0cyclictest0-21swapper/210:00:152
7268991412,0cyclictest25401-21sshd11:00:452
271140,0ktimersoftd/20-21swapper/209:32:132
7269991312,0cyclictest0-21swapper/312:19:083
7269991312,0cyclictest0-21swapper/310:30:443
7269991312,0cyclictest0-21swapper/309:18:433
7269991310,0cyclictest31586-21diskmemload12:21:193
726999130,0cyclictest0-21swapper/312:38:103
726999130,0cyclictest0-21swapper/311:45:243
726999130,0cyclictest0-21swapper/310:24:553
726999130,0cyclictest0-21swapper/310:24:553
7268991310,0cyclictest0-21swapper/209:10:262
7266991312,0cyclictest0-21swapper/011:16:070
7266991312,0cyclictest0-21swapper/010:49:510
726699130,0cyclictest0-21swapper/012:05:500
726699130,0cyclictest0-21swapper/010:53:200
726699130,0cyclictest0-21swapper/009:20:380
41130,0ktimersoftd/00-21swapper/009:25:030
112750130,0irq/25-eth00-21swapper/111:15:161
7269991211,0cyclictest1849-21sshd11:36:293
7269991211,0cyclictest0-21swapper/309:40:333
726999120,0cyclictest29346-21sshd12:06:063
726999120,0cyclictest17127-21sshd10:55:223
726999120,0cyclictest0-21swapper/312:13:183
726999120,0cyclictest0-21swapper/310:47:073
726999120,0cyclictest0-21swapper/309:54:293
7268991211,0cyclictest0-21swapper/209:19:192
7268991210,0cyclictest0-21swapper/211:21:592
726899120,0cyclictest18808-21sshd12:26:202
726799129,0cyclictest0-21swapper/111:14:081
7267991211,0cyclictest0-21swapper/112:17:181
7267991211,0cyclictest0-21swapper/112:07:531
726799120,0cyclictest19472-21sshd10:30:041
726799120,0cyclictest0-21swapper/110:45:381
7266991211,0cyclictest0-21swapper/012:24:040
7266991211,0cyclictest0-21swapper/010:32:390
7266991210,0cyclictest0-21swapper/010:26:510
7266991210,0cyclictest0-21swapper/009:45:020
7266991210,0cyclictest0-21swapper/009:41:260
726699120,0cyclictest31586-21diskmemload11:39:130
726699120,0cyclictest0-21swapper/012:33:430
726699120,0cyclictest0-21swapper/010:39:310
726699120,0cyclictest0-21swapper/010:39:310
112750120,0irq/25-eth030824-21sshd11:23:070
112750120,0irq/25-eth00-21swapper/209:22:122
112750120,0irq/25-eth00-21swapper/011:46:510
112750120,0irq/25-eth00-21swapper/009:55:180
9950110,0irq/24-0000:00:0-21swapper/011:50:040
726999119,0cyclictest0-21swapper/307:13:073
7269991111,0cyclictest0-21swapper/312:34:353
7269991111,0cyclictest0-21swapper/310:36:323
7269991111,0cyclictest0-21swapper/310:36:323
7269991111,0cyclictest0-21swapper/309:47:453
7269991111,0cyclictest0-21swapper/309:29:453
7269991111,0cyclictest0-21swapper/307:49:233
7269991110,0cyclictest2928-21sshd10:14:563
7269991110,0cyclictest0-21swapper/311:24:243
7269991110,0cyclictest0-21swapper/310:18:533
726999110,0cyclictest0-21swapper/310:50:213
726999110,0cyclictest0-21swapper/309:34:363
726899119,0cyclictest0-21swapper/212:37:572
726899119,0cyclictest0-21swapper/211:37:052
726899119,0cyclictest0-21swapper/208:55:082
726899119,0cyclictest0-21swapper/207:12:412
7268991111,0cyclictest0-21swapper/212:04:302
7268991111,0cyclictest0-21swapper/209:26:452
7268991111,0cyclictest0-21swapper/208:43:052
7268991111,0cyclictest0-21swapper/208:24:212
7268991111,0cyclictest0-21swapper/207:56:432
7268991110,0cyclictest9432-21df_inode10:50:112
7268991110,0cyclictest0-21swapper/210:36:062
7268991110,0cyclictest0-21swapper/210:36:062
7268991110,0cyclictest0-21swapper/207:15:092
726899110,0cyclictest5077-21cpuspeed_turbos10:15:102
726899110,0cyclictest0-21swapper/207:27:412
726899110,0cyclictest0-21swapper/207:27:402
7267991111,0cyclictest0-21swapper/112:11:281
7267991111,0cyclictest0-21swapper/110:38:461
7267991111,0cyclictest0-21swapper/110:38:461
7267991110,0cyclictest0-21swapper/111:51:031
7266991111,0cyclictest0-21swapper/010:56:140
7266991110,0cyclictest31586-21diskmemload09:37:250
7266991110,0cyclictest0-21swapper/010:10:490
726699110,0cyclictest0-21swapper/012:00:490
726699110,0cyclictest0-21swapper/008:26:370
726699110,0cyclictest0-21swapper/007:35:140
271110,0ktimersoftd/20-21swapper/210:45:242
271110,0ktimersoftd/20-21swapper/209:50:132
112750110,0irq/25-eth016949-21sshd09:29:251
9950100,0irq/24-0000:00:32509-21sshd09:14:211
726999109,0cyclictest7688-21memory11:50:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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