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2026-02-27 - 15:57
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Fri Feb 27, 2026 12:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120650600,0irq/26-eth1-rx-0-21swapper/307:05:503
120650600,0irq/26-eth1-rx-0-21swapper/107:06:281
2464324620,0sleep00-21swapper/007:09:500
2430124624,0sleep20-21swapper/207:05:362
2472699160,0cyclictest0-21swapper/307:25:223
2472599160,0cyclictest0-21swapper/207:15:192
24724991615,0cyclictest0-21swapper/111:30:201
2472699150,0cyclictest0-21swapper/311:30:143
24724991514,0cyclictest0-21swapper/112:23:051
2472399150,0cyclictest0-21swapper/007:15:190
24726991412,0cyclictest0-21swapper/311:47:123
2472699140,0cyclictest0-21swapper/308:45:163
24725991413,0cyclictest0-21swapper/210:31:232
24725991411,0cyclictest0-21swapper/210:26:382
2472599140,0cyclictest0-21swapper/208:35:102
2472599140,0cyclictest0-21swapper/207:35:112
24724991413,0cyclictest0-21swapper/111:35:471
24723991414,0cyclictest0-21swapper/009:50:190
271130,0ktimersoftd/20-21swapper/210:58:132
271130,0ktimersoftd/20-21swapper/209:10:192
24726991312,0cyclictest0-21swapper/310:24:163
24726991312,0cyclictest0-21swapper/309:18:103
2472699130,0cyclictest1315-21bash09:41:453
2472699130,0cyclictest0-21swapper/312:10:473
2472699130,0cyclictest0-21swapper/309:35:213
2472699130,0cyclictest0-21swapper/309:23:593
24725991312,0cyclictest0-21swapper/209:59:272
2472599130,0cyclictest0-21swapper/210:15:172
2472599130,0cyclictest0-21swapper/209:26:552
2472599130,0cyclictest0-21swapper/208:25:142
24724991312,0cyclictest0-21swapper/112:27:211
24724991312,0cyclictest0-21swapper/110:14:501
2472499130,0cyclictest0-21swapper/112:39:271
2472499130,0cyclictest0-21swapper/111:03:081
2472499130,0cyclictest0-21swapper/110:55:081
24723991312,0cyclictest16756-21diskmemload10:47:080
24723991312,0cyclictest0-21swapper/011:14:390
2472399130,0cyclictest0-21swapper/012:39:560
2472399130,0cyclictest0-21swapper/011:09:090
112750130,0irq/25-eth00-21swapper/011:20:540
271120,0ktimersoftd/20-21swapper/212:02:142
24726991212,0cyclictest112750irq/25-eth009:56:593
24726991211,0cyclictest21128-21bash11:08:053
24726991211,0cyclictest0-21swapper/311:42:423
24726991211,0cyclictest0-21swapper/310:01:093
24726991210,0cyclictest0-21swapper/312:07:333
24726991210,0cyclictest0-21swapper/312:02:463
2472699120,0cyclictest9012-21bash10:36:443
2472699120,0cyclictest17557-21sshd10:57:433
2472699120,0cyclictest0-21swapper/311:00:583
2472699120,0cyclictest0-21swapper/310:19:023
2472699120,0cyclictest0-21swapper/309:26:533
2472699120,0cyclictest0-21swapper/308:35:183
24725991211,0cyclictest21539-21sshd09:35:102
24725991211,0cyclictest0-21swapper/212:10:442
24725991210,0cyclictest32663-21sshd09:46:262
24725991210,0cyclictest0-21swapper/211:45:232
2472599120,0cyclictest0-21swapper/212:36:592
2472599120,0cyclictest0-21swapper/212:07:282
2472599120,0cyclictest0-21swapper/211:59:282
24724991211,0cyclictest16756-21diskmemload10:29:341
24724991211,0cyclictest0-21swapper/112:11:411
24724991211,0cyclictest0-21swapper/110:50:221
24724991211,0cyclictest0-21swapper/110:50:221
24724991210,0cyclictest0-21swapper/109:48:481
24724991210,0cyclictest0-21swapper/109:11:511
24724991210,0cyclictest0-21swapper/109:00:211
2472499120,0cyclictest15497-21sshd10:32:491
2472499120,0cyclictest0-21swapper/112:08:261
2472499120,0cyclictest0-21swapper/111:55:401
2472499120,0cyclictest0-21swapper/110:40:151
2472499120,0cyclictest0-21swapper/110:01:341
24723991211,0cyclictest12982-21sshd10:37:230
24723991211,0cyclictest0-21swapper/011:04:400
24723991211,0cyclictest0-21swapper/010:26:060
24723991211,0cyclictest0-21swapper/010:21:130
24723991210,0cyclictest0-21swapper/010:34:070
24723991210,0cyclictest0-21swapper/010:11:570
2472399120,0cyclictest522-21cp09:56:120
112750120,0irq/25-eth00-21swapper/111:49:371
112750120,0irq/25-eth00-21swapper/012:11:560
351110,0ktimersoftd/30-21swapper/311:27:213
2472699112,0cyclictest112750irq/25-eth011:12:403
24726991111,0cyclictest0-21swapper/310:42:093
24726991111,0cyclictest0-21swapper/308:59:563
24726991110,0cyclictest25801-21bash11:38:143
24726991110,0cyclictest18707-21bash10:13:423
24726991110,0cyclictest0-21swapper/311:50:143
24726991110,0cyclictest0-21swapper/310:29:093
24726991110,0cyclictest0-21swapper/309:32:423
2472599119,0cyclictest0-21swapper/207:57:212
24725991111,0cyclictest5815-21bash10:46:022
24725991110,0cyclictest8286-21bash10:07:112
24725991110,0cyclictest13098-21bash11:41:082
24725991110,0cyclictest12561-21sshd11:06:432
24725991110,0cyclictest12041-21bash10:42:062
24725991110,0cyclictest11850-21bash12:20:192
24725991110,0cyclictest0-21swapper/211:29:072
2472599110,0cyclictest0-21swapper/208:59:292
2472599110,0cyclictest0-21swapper/207:21:062
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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