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2026-05-16 - 06:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Sat May 16, 2026 00:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120650660,0irq/26-eth1-rx-0-21swapper/319:08:433
112750630,0irq/25-eth00-21swapper/119:07:411
120650470,0irq/26-eth1-rx-0-21swapper/219:05:432
112750400,0irq/25-eth00-21swapper/019:05:280
696099160,0cyclictest0-21swapper/020:05:180
6962991513,0cyclictest23162-21bash23:13:362
112750150,0irq/25-eth016607-21sshd21:50:311
6962991413,0cyclictest0-21swapper/200:26:472
6961991413,0cyclictest0-21swapper/121:37:101
6961991413,0cyclictest0-21swapper/121:37:091
696199140,0cyclictest21064-21sshd23:39:151
696199140,0cyclictest0-21swapper/122:37:001
696099140,0cyclictest2370-21bash21:27:250
696099140,0cyclictest0-21swapper/022:55:210
112750140,0irq/25-eth00-21swapper/000:08:400
6963991312,0cyclictest32425-21ntp_states20:00:183
6963991312,0cyclictest1723-21sshd00:02:383
6963991312,0cyclictest0-21swapper/321:25:003
6963991312,0cyclictest0-21swapper/321:24:593
696399130,0cyclictest31274-21diskmemload21:58:273
696399130,0cyclictest31149-21sshd22:22:443
696399130,0cyclictest0-21swapper/323:59:503
696399130,0cyclictest0-21swapper/322:42:073
696399130,0cyclictest0-21swapper/321:13:023
6962991312,0cyclictest0-21swapper/222:25:582
696299130,0cyclictest0-21swapper/223:03:162
696299130,0cyclictest0-21swapper/221:23:012
696299130,0cyclictest0-21swapper/221:23:002
696299130,0cyclictest0-21swapper/200:11:062
696199134,0cyclictest0-21swapper/119:15:011
6961991312,0cyclictest0-21swapper/122:32:271
6961991310,0cyclictest11793-21sshd21:20:131
6961991310,0cyclictest11793-21sshd21:20:121
696199130,0cyclictest18-21rcuc/121:57:081
6960991312,0cyclictest0-21swapper/021:16:590
6960991311,0cyclictest29090-21sshd00:01:560
6960991311,0cyclictest0-21swapper/021:55:530
696099130,0cyclictest29722-21sshd21:43:530
696099130,0cyclictest29722-21sshd21:43:520
41130,0ktimersoftd/031274-21diskmemload22:38:060
112750130,0irq/25-eth031274-21diskmemload22:55:293
112750130,0irq/25-eth015289-21sshd00:26:140
112750130,0irq/25-eth00-21swapper/121:44:571
112750130,0irq/25-eth00-21swapper/121:44:561
6963991211,0cyclictest0-21swapper/323:32:043
6963991211,0cyclictest0-21swapper/322:47:563
6963991211,0cyclictest0-21swapper/321:34:593
696399120,0cyclictest0-21swapper/323:49:583
696399120,0cyclictest0-21swapper/322:31:473
696399120,0cyclictest0-21swapper/322:03:133
696399120,0cyclictest0-21swapper/320:10:183
6962991211,0cyclictest0-21swapper/223:49:372
6962991210,0cyclictest0-21swapper/200:24:002
696299120,0cyclictest0-21swapper/221:49:582
696199129,0cyclictest26720-21id22:00:241
6961991212,0cyclictest8-21rcu_preempt22:45:491
6961991212,0cyclictest18-21rcuc/100:28:031
6961991211,0cyclictest11855-21sshd23:42:171
6961991211,0cyclictest0-21swapper/121:47:101
6961991211,0cyclictest0-21swapper/119:34:081
6961991211,0cyclictest0-21swapper/100:18:101
6961991211,0cyclictest0-21swapper/100:08:041
696199121,0cyclictest20-21ksoftirqd/122:18:521
6961991210,0cyclictest0-21swapper/123:52:231
6961991210,0cyclictest0-21swapper/123:22:381
696199120,0cyclictest112750irq/25-eth021:27:101
696199120,0cyclictest0-21swapper/123:49:361
696199120,0cyclictest0-21swapper/121:32:111
6960991211,0cyclictest0-21swapper/023:40:120
6960991211,0cyclictest0-21swapper/022:23:520
6960991211,0cyclictest0-21swapper/021:32:250
6960991210,0cyclictest0-21swapper/023:01:110
6960991210,0cyclictest0-21swapper/022:25:240
6960991210,0cyclictest0-21swapper/000:22:080
696099120,0cyclictest0-21swapper/023:50:330
41120,0ktimersoftd/031274-21diskmemload23:37:210
41120,0ktimersoftd/00-21swapper/021:35:200
41120,0ktimersoftd/00-21swapper/021:35:190
351120,0ktimersoftd/30-21swapper/323:19:533
112750120,0irq/25-eth025339-21sshd21:21:540
112750120,0irq/25-eth025339-21sshd21:21:530
112750120,0irq/25-eth00-21swapper/323:10:283
6963991111,0cyclictest0-21swapper/322:13:123
6963991111,0cyclictest0-21swapper/321:53:123
6963991111,0cyclictest0-21swapper/321:41:423
6963991111,0cyclictest0-21swapper/321:41:423
6963991111,0cyclictest0-21swapper/300:25:243
6963991111,0cyclictest0-21swapper/300:15:313
6963991111,0cyclictest0-21swapper/300:06:563
6963991110,0cyclictest16542-21id23:08:223
6963991110,0cyclictest0-21swapper/321:29:583
696299119,0cyclictest0-21swapper/221:05:072
6962991111,0cyclictest0-21swapper/222:54:262
6962991110,0cyclictest1479-21nfsd00:15:242
6962991110,0cyclictest11983-21sshd23:42:182
6962991110,0cyclictest0-21swapper/222:21:272
6962991110,0cyclictest0-21swapper/222:08:252
6962991110,0cyclictest0-21swapper/221:59:572
6962991110,0cyclictest0-21swapper/221:36:282
6962991110,0cyclictest0-21swapper/221:36:282
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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