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2025-12-18 - 11:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rack7slot0.osadl.org (updated Thu Dec 18, 2025 00:43:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120650680,0irq/26-eth1-rx-0-21swapper/319:08:083
112750580,0irq/25-eth00-21swapper/119:09:201
112750520,0irq/25-eth00-21swapper/219:07:102
3184824321,0sleep00-21swapper/019:05:040
160099140,0cyclictest0-21swapper/323:16:523
1599991411,0cyclictest0-21swapper/222:58:082
159799140,0cyclictest0-21swapper/121:05:141
271130,0ktimersoftd/20-21swapper/222:15:232
159999130,0cyclictest0-21swapper/221:34:512
159799130,0cyclictest0-21swapper/123:26:431
159699130,0cyclictest30490-21cat21:30:210
351120,0ktimersoftd/30-21swapper/323:20:273
1600991212,0cyclictest0-21swapper/321:10:353
1600991211,0cyclictest0-21swapper/323:53:283
1600991211,0cyclictest0-21swapper/323:10:143
1600991210,0cyclictest0-21swapper/321:57:313
1600991210,0cyclictest0-21swapper/300:33:173
160099120,0cyclictest0-21swapper/323:59:083
160099120,0cyclictest0-21swapper/322:50:223
160099120,0cyclictest0-21swapper/322:07:443
160099120,0cyclictest0-21swapper/300:35:163
1599991212,0cyclictest0-21swapper/223:02:332
1599991210,0cyclictest0-21swapper/221:08:222
159999120,0cyclictest0-21swapper/223:13:492
159999120,0cyclictest0-21swapper/222:10:522
159999120,0cyclictest0-21swapper/200:30:582
159999120,0cyclictest0-21swapper/200:25:192
159999120,0cyclictest0-21swapper/200:21:192
1597991212,0cyclictest0-21swapper/121:16:231
1597991211,0cyclictest0-21swapper/122:10:241
1597991210,0cyclictest0-21swapper/122:59:271
1597991210,0cyclictest0-21swapper/122:46:251
1597991210,0cyclictest0-21swapper/122:33:101
1597991210,0cyclictest0-21swapper/121:55:321
1597991210,0cyclictest0-21swapper/121:39:581
1597991210,0cyclictest0-21swapper/121:32:111
1597991210,0cyclictest0-21swapper/100:29:201
159799120,0cyclictest0-21swapper/123:17:051
159799120,0cyclictest0-21swapper/122:03:191
159799120,0cyclictest0-21swapper/121:45:051
1596991212,0cyclictest25926-21diskmemload22:21:000
1596991211,0cyclictest25926-21diskmemload21:51:160
1596991210,0cyclictest0-21swapper/023:38:220
1596991210,0cyclictest0-21swapper/023:05:500
1596991210,0cyclictest0-21swapper/022:34:420
1596991210,0cyclictest0-21swapper/000:24:230
1596991210,0cyclictest0-21swapper/000:16:420
159699120,0cyclictest0-21swapper/023:20:500
159699120,0cyclictest0-21swapper/022:16:210
112750120,0irq/25-eth031270-21sshd23:46:230
41110,0ktimersoftd/00-21swapper/021:36:300
1600991111,0cyclictest0-21swapper/323:08:023
1600991111,0cyclictest0-21swapper/322:32:433
1600991111,0cyclictest0-21swapper/321:47:043
1600991111,0cyclictest0-21swapper/321:34:093
1600991111,0cyclictest0-21swapper/300:12:163
1600991110,0cyclictest0-21swapper/321:26:233
1599991111,0cyclictest0-21swapper/223:43:142
1599991111,0cyclictest0-21swapper/222:20:092
1599991111,0cyclictest0-21swapper/221:29:302
1599991111,0cyclictest0-21swapper/219:33:492
1599991111,0cyclictest0-21swapper/200:04:142
1599991110,0cyclictest25714-21sshd22:44:542
1599991110,0cyclictest0-21swapper/223:56:342
1599991110,0cyclictest0-21swapper/219:17:112
159999110,0cyclictest0-21swapper/223:16:022
159999110,0cyclictest0-21swapper/222:51:312
159999110,0cyclictest0-21swapper/220:33:242
159999110,0cyclictest0-21swapper/219:40:392
159999110,0cyclictest0-21swapper/219:14:462
1597991111,0cyclictest0-21swapper/123:53:261
1597991111,0cyclictest0-21swapper/123:47:451
1597991111,0cyclictest0-21swapper/122:35:231
1597991111,0cyclictest0-21swapper/121:52:521
1597991111,0cyclictest0-21swapper/100:08:341
1597991110,0cyclictest25125-21bash23:03:501
1597991110,0cyclictest0-21swapper/121:11:021
1597991110,0cyclictest0-21swapper/119:46:361
159699119,0cyclictest0-21swapper/023:51:570
159699119,0cyclictest0-21swapper/022:41:340
159699118,0cyclictest0-21swapper/020:30:460
1596991111,0cyclictest25926-21diskmemload23:30:430
1596991111,0cyclictest0-21swapper/022:09:160
1596991111,0cyclictest0-21swapper/021:56:360
1596991111,0cyclictest0-21swapper/021:40:480
1596991111,0cyclictest0-21swapper/000:05:200
1596991110,0cyclictest0-21swapper/022:25:390
1596991110,0cyclictest0-21swapper/000:37:570
159699110,0cyclictest0-21swapper/023:28:430
159699110,0cyclictest0-21swapper/021:27:410
159699110,0cyclictest0-21swapper/021:22:200
159699110,0cyclictest0-21swapper/020:19:080
112750110,0irq/25-eth00-21swapper/223:34:022
41100,0ktimersoftd/00-21swapper/022:35:300
41100,0ktimersoftd/00-21swapper/019:52:120
351100,0ktimersoftd/30-21swapper/321:36:303
271100,0ktimersoftd/20-21swapper/221:36:302
191100,0ktimersoftd/10-21swapper/123:43:421
1600991010,0cyclictest0-21swapper/322:14:363
1600991010,0cyclictest0-21swapper/300:23:393
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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