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2026-07-03 - 10:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Fri Jul 03, 2026 00:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13284212258,23sleep30-21swapper/319:07:473
13346211651,59sleep10-21swapper/119:08:291
13299210950,54sleep00-21swapper/019:07:560
2728321080,2sleep22191-21stress22:05:232
1330629567,23sleep20-21swapper/219:08:022
112092720,1sleep22191-21stress22:43:372
1282024810,15sleep10-21swapper/121:31:451
13575994116,22cyclictest0-21swapper/023:06:030
13575994111,27cyclictest0-21swapper/000:20:360
13575994110,28cyclictest0-21swapper/022:38:280
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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