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2026-05-21 - 12:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Thu May 21, 2026 00:45:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5821212462,23sleep30-21swapper/319:09:023
5775211854,59sleep20-21swapper/219:08:252
5738211553,57sleep10-21swapper/119:08:051
5534211050,55sleep00-21swapper/019:05:380
6004994110,28cyclictest0-21swapper/200:38:002
6004994110,28cyclictest0-21swapper/200:37:592
6002994111,27cyclictest0-21swapper/023:10:510
6002994111,23cyclictest0-21swapper/019:31:020
6004994016,21cyclictest0-21swapper/222:03:022
6004994012,25cyclictest0-21swapper/223:15:372
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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