You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-31 - 22:10
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Wed Dec 31, 2025 12:45:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2580821190,1sleep24297-21stress11:15:412
17696211351,57sleep00-21swapper/007:05:490
2272421080,1sleep24297-21stress09:50:452
1774729750,42sleep10-21swapper/107:06:311
1772929264,23sleep30-21swapper/307:06:163
1788228154,21sleep20-21swapper/207:08:162
81982680,1sleep14297-21stress09:16:551
18120994312,21cyclictest0-21swapper/211:30:382
18118994311,29cyclictest0-21swapper/010:22:080
18118994310,30cyclictest0-21swapper/012:34:150
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional