You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-15 - 16:35
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Wed Jul 15, 2026 12:45:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7221212466,53sleep20-21swapper/207:05:382
7212211754,23sleep30-21swapper/307:05:323
7481210950,20sleep10-21swapper/107:08:511
746328851,32sleep00-21swapper/007:08:370
217682770,12sleep2767999cyclictest12:35:032
7679994729,16cyclictest0-21swapper/211:32:042
7679994729,16cyclictest0-21swapper/211:32:042
7677994412,16cyclictest0-21swapper/009:56:170
7677994314,19cyclictest0-21swapper/011:05:060
7679994216,23cyclictest0-21swapper/211:58:262
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional