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2026-06-30 - 10:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Tue Jun 30, 2026 00:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2414212666,55sleep20-21swapper/219:07:002
2487212359,58sleep30-21swapper/319:07:493
2608621160,1sleep123719-21stress22:27:581
2608621160,1sleep123719-21stress22:27:581
2350211551,58sleep00-21swapper/019:06:130
2437211050,55sleep10-21swapper/119:07:151
2765994214,12cyclictest0-21swapper/223:10:332
2764994015,22cyclictest0-21swapper/122:36:171
2763994011,25cyclictest0-21swapper/022:28:010
2763994011,25cyclictest0-21swapper/022:28:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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