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2026-06-05 - 21:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Fri Jun 05, 2026 12:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12318211754,23sleep20-21swapper/207:05:292
1218621170,1sleep31007-21stress12:04:193
12436211351,23sleep00-21swapper/007:06:590
12326211250,56sleep30-21swapper/307:05:333
1256928556,24sleep10-21swapper/107:08:361
269262760,1sleep01013-21stress11:21:140
269262760,1sleep01013-21stress11:21:130
12778995320,22cyclictest0-21swapper/009:45:270
12778995320,22cyclictest0-21swapper/009:45:260
1278199527,42cyclictest0-21swapper/309:48:413
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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