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2026-04-29 - 07:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Wed Apr 29, 2026 00:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27374211653,58sleep00-21swapper/019:07:310
27227211351,57sleep30-21swapper/319:05:403
2750429472,18sleep20-21swapper/219:09:052
2748828253,24sleep10-21swapper/119:08:511
175122770,1sleep215529-21stress21:13:142
27676994315,21cyclictest0-21swapper/123:23:321
27676994115,24cyclictest0-21swapper/123:33:191
27675994010,27cyclictest0-21swapper/023:55:170
27675994010,19cyclictest0-21swapper/020:34:400
46902395,13sleep20-21swapper/220:45:002
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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