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2026-09-08 - 02:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rack7slot1.osadl.org (updated Tue Sep 08, 2026 00:45:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3244721220,1sleep212673-21stress00:19:462
22646212056,23sleep30-21swapper/319:06:243
22646212056,23sleep30-21swapper/319:06:233
22599211552,58sleep00-21swapper/019:05:480
22599211552,58sleep00-21swapper/019:05:470
483821140,1sleep012671-21stress00:30:010
22772211352,56sleep10-21swapper/119:07:541
22772211352,56sleep10-21swapper/119:07:531
2276329668,23sleep20-21swapper/219:07:472
2276329668,23sleep20-21swapper/219:07:462
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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