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2026-04-08 - 18:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackaslot8.osadl.org (updated Wed Apr 08, 2026 12:44:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
230672288225,20sleep10-21swapper/107:09:041
229982285217,21sleep00-21swapper/007:08:100
229572270220,41sleep20-21swapper/207:07:402
211682252221,20sleep30-21swapper/307:05:083
65492660,0sleep10-21swapper/110:03:371
59442640,0sleep30-21swapper/311:40:293
149172630,0sleep10-21swapper/111:26:331
284042600,0sleep20-21swapper/210:55:192
295212580,0sleep20-21swapper/209:38:262
232162490,0sleep10-21swapper/110:33:201
21722200,0sleep30-21swapper/307:30:193
180472190,0sleep10-21swapper/111:09:281
145582190,0sleep10-21swapper/110:28:031
8792170,0sleep00-21swapper/012:16:460
248422170,0sleep20-21swapper/209:55:132
220922170,0sleep10-21swapper/109:14:471
141952170,0sleep30-21swapper/311:25:593
131412160,0sleep10-21swapper/110:07:211
187862140,0sleep30-21swapper/312:08:203
32112130,0sleep00-21swapper/010:20:380
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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