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2026-08-25 - 11:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackaslot8.osadl.org (updated Tue Aug 25, 2026 00:44:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12882331302,19sleep20-21swapper/219:06:342
12922286256,20sleep10-21swapper/119:06:371
13112270239,20sleep30-21swapper/319:06:473
14002257225,19sleep00-21swapper/019:07:440
55892660,0sleep00-21swapper/021:56:180
225152640,0sleep10-21swapper/122:45:161
4602630,3sleep228-21ksoftirqd/221:34:292
82912610,0sleep00-21swapper/022:36:390
106502610,0sleep00-21swapper/023:35:490
43532550,0sleep00-21swapper/023:53:550
260392550,0sleep20-21swapper/221:49:522
146932200,1chrt14692-21ssh00:39:401
288042190,0sleep30-21swapper/323:48:013
270262190,0sleep20-21swapper/200:27:042
43312170,0sleep10-21swapper/120:25:131
313402160,0sleep10-21swapper/123:29:531
183882160,0sleep00-21swapper/021:45:130
239852140,0sleep30-21swapper/321:48:173
166599143,6cyclictest23881-21diskmemload00:38:350
81822130,0sleep10-21swapper/100:15:261
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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