You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-29 - 06:41
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Wed Jul 29, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
119132127106,17sleep60-21swapper/619:07:0312
1935621150,1sleep1225998-1kworker/12:2H21:10:404
11918211386,23sleep110-21swapper/1119:07:083
1127521130,0sleep20-21swapper/223:21:338
118872112102,6sleep140-21swapper/1419:06:396
3040921100,2sleep10-21swapper/122:06:231
2918621070,1sleep150-21swapper/1523:41:187
1872021050,6sleep81267699cyclictest00:09:0014
11909210390,8sleep20-21swapper/219:06:598
11885210391,8sleep120-21swapper/1219:06:374
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional