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2026-05-11 - 09:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Mon May 11, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3070821720,1sleep122403499cyclictest23:03:284
233062124106,13sleep20-21swapper/219:09:038
235272122104,14sleep70-21swapper/719:11:3313
233082122106,12sleep40-21swapper/419:09:0510
201122117103,9sleep80-21swapper/819:07:1714
23333211694,18sleep110-21swapper/1119:09:283
235292114101,9sleep90-21swapper/919:11:3515
990221100,7sleep142403799cyclictest23:26:306
990221100,7sleep142403799cyclictest23:26:306
23244210894,9sleep120-21swapper/1219:08:254
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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