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2026-04-24 - 07:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Fri Apr 24, 2026 00:43:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2743521420,4sleep02488499cyclictest00:14:110
244182140119,17sleep120-21swapper/1219:11:564
903621350,0sleep140-21swapper/1423:52:136
242052133116,13sleep00-21swapper/019:09:350
243062126105,16sleep70-21swapper/719:11:0313
24217212694,28sleep110-21swapper/1119:09:463
243092124104,15sleep100-21swapper/1019:11:062
833421210,2sleep121-21systemd00:31:304
242102121106,10sleep50-21swapper/519:09:4011
244072115102,9sleep20-21swapper/219:11:468
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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