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2026-01-02 - 23:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Fri Jan 02, 2026 00:43:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2490021800,4sleep71995899cyclictest22:44:2213
1449521780,6sleep51995699cyclictest23:15:2211
1449521780,6sleep51995699cyclictest23:15:2211
195232140116,20sleep60-21swapper/619:09:5412
193822137105,28sleep110-21swapper/1119:08:393
2985921240,5sleep71995899cyclictest23:23:2513
2985921240,5sleep71995899cyclictest23:23:2513
2770021220,1sleep50-21swapper/523:04:0811
192442122104,13sleep20-21swapper/219:06:548
207921180,5sleep71995899cyclictest23:45:5313
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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