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2026-07-01 - 10:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Tue Jun 30, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
254062131104,23sleep110-21swapper/1119:11:473
3164721130,6sleep52599899cyclictest23:12:5311
30421120,1sleep20-21swapper/223:40:078
25404211292,15sleep90-21swapper/919:11:4515
25359211193,13sleep30-21swapper/319:11:079
1367421060,6sleep132601099cyclictest23:54:455
485621050,0sleep140-21swapper/1423:33:226
25370210590,10sleep140-21swapper/1419:11:186
2618621040,0sleep110-21swapper/1121:45:163
374421030,1sleep20-21swapper/222:09:118
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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