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2026-07-05 - 16:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Sun Jul 05, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1338021630,7sleep6293399cyclictest23:49:3712
1306621400,7sleep3292899cyclictest22:05:329
1349621350,1sleep140-21swapper/1400:12:136
1628621330,6sleep3292899cyclictest22:23:599
23122130117,9sleep150-21swapper/1519:08:287
2113213095,30sleep110-21swapper/1119:05:593
22482126103,18sleep100-21swapper/1019:07:342
2228212191,25sleep80-21swapper/819:07:1614
23062120102,12sleep90-21swapper/919:08:2215
363921190,1sleep120-21swapper/1221:24:304
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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