You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-16 - 14:37
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Thu Jul 16, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2193321890,4sleep12514799cyclictest22:38:161
244322138121,12sleep130-21swapper/1319:06:585
246932120105,11sleep20-21swapper/219:10:008
245542119102,13sleep120-21swapper/1219:08:494
244012117103,10sleep30-21swapper/319:06:329
24526211092,13sleep10-21swapper/119:08:221
24494210891,12sleep70-21swapper/719:07:5613
1677321060,3sleep131201rcuc/1322:21:375
2811821050,1sleep60-21swapper/621:53:5812
2811821050,1sleep60-21swapper/621:53:5812
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional