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2026-09-06 - 05:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Sun Sep 06, 2026 00:43:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
656621640,2sleep32850399cyclictest23:12:139
1045321620,3sleep142851899cyclictest00:27:176
277102138104,29sleep50-21swapper/519:06:4611
2165721270,0sleep100-21swapper/1021:13:032
2165721270,0sleep100-21swapper/1021:13:032
277022125103,18sleep140-21swapper/1419:06:396
3223321230,5sleep132851799cyclictest23:22:015
3223321230,5sleep132851799cyclictest23:22:015
2623121210,2sleep1326228-21sshd23:14:315
1329821210,2sleep813295-21cp23:56:1014
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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