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2026-08-09 - 23:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Sun Aug 09, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
421421860,5sleep41585099cyclictest21:35:5410
153912134104,25sleep70-21swapper/719:09:5813
153232130118,8sleep100-21swapper/1019:09:452
1933321250,5sleep91585699cyclictest22:53:4915
1933321250,5sleep91585699cyclictest22:53:4915
2190121190,0sleep150-21swapper/1500:04:317
2212921120,2sleep422128-21sh00:34:0210
475521110,1sleep90-21swapper/900:28:3015
15268211191,15sleep80-21swapper/819:08:5514
15233210995,10sleep120-21swapper/1219:08:274
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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