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2026-05-09 - 21:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Sat May 09, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
667721720,7sleep8526099cyclictest21:14:4914
2671621520,4sleep12526899cyclictest00:33:364
4461212292,25sleep90-21swapper/919:09:5815
4297212193,23sleep70-21swapper/719:07:4813
46582114102,8sleep60-21swapper/619:12:0412
1172721140,2sleep50-21swapper/500:00:5111
1814621090,2sleep31062-21polkitd00:04:349
452321050,1sleep120-21swapper/1200:40:494
4378210592,8sleep110-21swapper/1119:08:563
749521040,0sleep00-21swapper/021:32:520
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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