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2026-05-05 - 18:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Tue May 05, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1786721870,6sleep1393399cyclictest22:58:575
1484321750,5sleep1293299cyclictest23:26:134
1484321750,5sleep1293299cyclictest23:26:134
294582137103,30sleep30-21swapper/319:07:139
325662134103,26sleep00-21swapper/019:07:580
326172127101,21sleep90-21swapper/919:08:3915
326882120103,12sleep120-21swapper/1219:09:304
32677211891,22sleep50-21swapper/519:09:2311
1839821180,0sleep150-21swapper/1521:31:007
972421170,1sleep159721-2110-uname22:58:117
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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