You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-15 - 11:03
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Fri May 15, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
463021690,3sleep142197399cyclictest23:08:336
1577921600,6sleep152197599cyclictest22:28:437
211672143118,20sleep30-21swapper/319:08:309
211662121104,13sleep20-21swapper/219:08:298
21315212096,19sleep90-21swapper/919:10:2815
21314211895,18sleep80-21swapper/819:10:2714
21191211894,20sleep100-21swapper/1019:08:532
1457621180,1sleep140-21swapper/1400:21:346
3156421170,6sleep142197399cyclictest21:30:556
213132115103,8sleep70-21swapper/719:10:2613
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional