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2026-06-06 - 18:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Sat Jun 06, 2026 00:43:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
601121680,3sleep61045899cyclictest22:37:3212
99792135116,14sleep110-21swapper/1119:12:003
99722130106,20sleep50-21swapper/519:11:5411
808821290,1sleep90-21swapper/921:39:3315
100172125107,14sleep90-21swapper/919:12:3015
65602118104,9sleep100-21swapper/1019:07:422
97672114102,8sleep140-21swapper/1419:09:386
1049721130,4sleep81046099cyclictest00:39:0014
199121110,2sleep128124-1kworker/12:1H22:37:064
1294121080,0sleep40-21swapper/400:32:4710
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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