You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-07 - 13:01
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Tue Jul 07, 2026 00:43:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1232421740,7sleep153094599cyclictest00:14:517
2363621720,5sleep33092999cyclictest21:33:229
2363621720,5sleep33092999cyclictest21:33:229
2535721440,7sleep63093399cyclictest23:15:5112
2130221420,5sleep73093499cyclictest23:34:3513
504821320,0sleep111051ktimersoftd/1119:20:213
2836821290,0sleep30-21swapper/323:54:039
303942128103,21sleep120-21swapper/1219:09:094
303942128103,21sleep120-21swapper/1219:09:094
270632128103,20sleep150-21swapper/1519:05:117
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional