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2026-01-07 - 21:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Wed Jan 07, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
628521850,6sleep10494399cyclictest00:38:442
176321850,5sleep12494599cyclictest21:00:484
2754321670,5sleep12494599cyclictest22:27:434
2280721670,6sleep14494999cyclictest21:36:086
2914021480,6sleep4493399cyclictest00:05:1310
614921340,1sleep150-21swapper/1522:58:007
614921340,1sleep150-21swapper/1522:58:007
4295212290,28sleep100-21swapper/1019:08:132
42682115102,9sleep40-21swapper/419:07:5110
42422114102,8sleep130-21swapper/1319:07:285
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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