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2026-05-18 - 11:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Mon May 18, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2959221800,6sleep41729099cyclictest00:14:5010
166892126104,18sleep40-21swapper/419:10:4710
15790212490,29sleep130-21swapper/1319:07:435
16629212391,27sleep00-21swapper/019:09:550
1247121220,2sleep140-21swapper/1400:26:146
538921210,1sleep2321ktimersoftd/223:58:138
16631211991,24sleep20-21swapper/219:09:578
16479211788,24sleep140-21swapper/1419:08:006
16605211589,21sleep100-21swapper/1019:09:332
3134921110,1sleep13122-21ksoftirqd/1323:19:375
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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