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2026-04-16 - 05:02
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Thu Apr 16, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
181221860,5sleep42481899cyclictest23:11:3210
2240821700,6sleep102482699cyclictest21:23:502
1741221540,6sleep122482999cyclictest23:33:364
573121490,4sleep112482799cyclictest23:22:043
1963321310,6sleep42481899cyclictest22:52:3210
1963321310,6sleep42481899cyclictest22:52:3210
243602120103,12sleep30-21swapper/319:11:399
241712120106,6sleep120-21swapper/1219:09:564
2072421190,6sleep02481399cyclictest20:22:100
2072421190,6sleep02481399cyclictest20:22:100
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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