You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-23 - 07:12
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Thu Apr 23, 2026 00:43:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2970721470,6sleep71844799cyclictest20:42:1113
177272128103,21sleep40-21swapper/419:09:0610
577021250,1sleep00-21swapper/023:37:470
17710211893,21sleep50-21swapper/519:08:5111
264721160,1sleep00-21swapper/023:14:310
17708211491,19sleep30-21swapper/319:08:499
17735211393,12sleep100-21swapper/1019:09:122
17828211291,15sleep90-21swapper/919:10:3115
2882721110,1sleep130-21swapper/1300:18:555
2882721110,1sleep130-21swapper/1300:18:555
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional