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2026-10-06 - 22:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Tue Oct 06, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2821821780,4sleep14753099cyclictest21:49:266
2420321780,3sleep2751499cyclictest21:45:138
2822921380,6sleep0751299cyclictest23:15:350
2822921380,6sleep0751299cyclictest23:15:350
744121340,0sleep10-21swapper/121:17:391
7092212392,26sleep10-21swapper/119:11:121
67582123109,10sleep90-21swapper/919:07:1915
2007521190,6sleep558-21ksoftirqd/522:29:0811
1233721170,0sleep70-21swapper/721:43:4213
6821210991,13sleep80-21swapper/819:08:0614
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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