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2026-08-25 - 02:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Mon Aug 24, 2026 00:43:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3965212292,25sleep100-21swapper/1019:09:212
39982119106,8sleep40-21swapper/419:09:4710
2428421180,2sleep13122-21ksoftirqd/1323:33:365
38882116104,8sleep50-21swapper/519:08:1211
3962211493,17sleep70-21swapper/719:09:1813
37932114102,8sleep150-21swapper/1519:07:027
1385121120,0sleep00-21swapper/000:08:250
40672111103,4sleep30-21swapper/319:10:029
2911821110,6sleep4457799cyclictest22:07:5210
439521100,0sleep140-21swapper/1422:05:216
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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