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2025-10-14 - 10:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Tue Oct 14, 2025 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2005821390,6sleep02033899cyclictest22:35:430
2005821390,6sleep02033899cyclictest22:35:430
1968121370,5sleep112035299cyclictest23:28:203
196012127104,19sleep110-21swapper/1119:08:243
196022114102,7sleep120-21swapper/1219:08:254
1000821110,0sleep60-21swapper/600:17:5912
1594421090,2sleep815933-21sshd21:32:1214
2711921080,6sleep12033999cyclictest23:47:091
19609210688,13sleep20-21swapper/219:08:318
19900210491,9sleep140-21swapper/1419:11:396
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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