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2026-06-10 - 23:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Wed Jun 10, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
844121690,5sleep13274299cyclictest00:09:595
21312137116,16sleep130-21swapper/1319:11:325
20592127104,18sleep60-21swapper/619:10:3712
19832123102,17sleep30-21swapper/319:09:309
20632120104,11sleep100-21swapper/1019:10:412
311662119101,11sleep110-21swapper/1119:07:463
1957211392,16sleep120-21swapper/1219:09:074
1290821090,1sleep1012907-2110-uname00:04:022
623221080,1sleep00-21swapper/021:12:420
2012210691,11sleep150-21swapper/1519:09:587
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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