You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-29 - 17:57
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Sun Mar 29, 2026 00:43:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1089521820,6sleep11442199cyclictest22:18:161
787821750,6sleep31442499cyclictest22:49:039
156921710,6sleep131443899cyclictest22:31:025
104782132117,10sleep110-21swapper/1119:06:433
13731212592,28sleep100-21swapper/1019:09:222
13663212195,22sleep150-21swapper/1519:08:397
136522116100,12sleep60-21swapper/619:08:3012
649921150,1sleep50-21swapper/522:38:3911
13763211590,20sleep80-21swapper/819:09:5214
13648211392,15sleep20-21swapper/219:08:268
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional