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2026-04-27 - 08:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot0.osadl.org (updated Mon Apr 27, 2026 00:43:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2147521440,7sleep82403899cyclictest23:48:5614
235332140120,15sleep10-21swapper/119:11:301
1823821380,0sleep60-21swapper/623:27:1412
1823821380,0sleep60-21swapper/623:27:1412
2015321370,6sleep02402699cyclictest22:47:490
233642132118,10sleep100-21swapper/1019:09:472
235682131105,21sleep130-21swapper/1319:11:595
299321220,1sleep130-21swapper/1321:24:035
235152118103,11sleep00-21swapper/019:11:130
2634821170,1sleep50-21swapper/500:11:5311
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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