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2026-02-23 - 22:52
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot3.osadl.org (updated Mon Feb 23, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
89850770irq/17-ehci_hcd945-21usb-storage12:18:250
147650740irq/28-eth0-rx-30854-21/usr/sbin/munin07:08:280
81720rcu_preempt30230-21ssh11:11:020
81710rcu_preempt0-21swapper/012:03:470
81710rcu_preempt0-21swapper/011:18:100
81710rcu_preempt0-21swapper/009:31:160
81700rcu_preempt0-21swapper/112:13:351
81700rcu_preempt0-21swapper/108:48:331
81700rcu_preempt0-21swapper/107:38:431
81700rcu_preempt0-21swapper/011:43:320
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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