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2026-02-26 - 07:01
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot3.osadl.org (updated Thu Feb 26, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
89850710irq/17-ehci_hcd945-21usb-storage22:40:491
81710rcu_preempt26774-21ssh23:37:170
81710rcu_preempt0-21swapper/019:13:450
81710rcu_preempt0-21swapper/000:26:420
81700rcu_preempt30089-21ssh21:41:040
81700rcu_preempt29770-21ssh22:41:180
81700rcu_preempt27426-21ssh21:36:180
81700rcu_preempt0-21swapper/121:30:221
81700rcu_preempt0-21swapper/022:45:030
81700rcu_preempt0-21swapper/000:35:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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