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2026-02-24 - 18:51
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot3.osadl.org (updated Tue Feb 24, 2026 12:43:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
81860rcu_preempt0-21swapper/007:08:390
81840rcu_preempt19-21ksoftirqd/112:02:201
81820rcu_preempt5850-21sendmail12:23:181
81800rcu_preempt19279-21timerandwakeup09:43:431
81790rcu_preempt31948-21df_abs10:08:321
89850780irq/17-ehci_hcd945-21usb-storage07:11:491
81770rcu_preempt21490-21irqstats09:48:381
81770rcu_preempt0-21swapper/011:59:150
81740rcu_preempt7255-21/usr/sbin/munin07:23:411
81720rcu_preempt1762-21diskmemload09:43:181
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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