You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-29 - 09:34
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot3.osadl.org (updated Thu Jan 29, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
81810rcu_preempt0-21swapper/119:08:011
81730rcu_preempt6764-21sendmail_mailqu19:47:281
81730rcu_preempt19-21ksoftirqd/122:52:251
81730rcu_preempt16423-21rm22:51:151
81710rcu_preempt27322-21diskmemload21:39:030
81710rcu_preempt26252-1kworker/0:0H21:26:110
81710rcu_preempt0-21swapper/023:12:380
81710rcu_preempt0-21swapper/023:07:130
81710rcu_preempt0-21swapper/022:54:560
81710rcu_preempt0-21swapper/022:12:330
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional