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2026-01-25 - 07:32
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot3.osadl.org (updated Sun Jan 25, 2026 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
89850780irq/17-ehci_hcd945-21usb-storage21:13:581
81740rcu_preempt26399-21ssh23:25:320
81730rcu_preempt3-21ksoftirqd/000:31:560
81720rcu_preempt26518-21df_abs21:27:100
81710rcu_preempt0-21swapper/122:02:171
81710rcu_preempt0-21swapper/121:17:181
81710rcu_preempt0-21swapper/023:47:110
81710rcu_preempt0-21swapper/023:11:550
81710rcu_preempt0-21swapper/021:39:120
81700rcu_preempt30976-21sh23:32:541
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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