You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-28 - 08:38
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot3.osadl.org (updated Wed Jan 28, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
89850720irq/17-ehci_hcd2808-21memory19:57:230
81720rcu_preempt4537-21ssh22:38:350
81720rcu_preempt1465-21ssh22:32:330
81710rcu_preempt9573-21ssh23:47:380
81710rcu_preempt0-21swapper/023:39:000
81710rcu_preempt0-21swapper/023:09:300
81710rcu_preempt0-21swapper/022:47:180
81700rcu_preempt5973-21df_inode22:42:170
81680rcu_preempt0-21swapper/119:32:231
147650680irq/28-eth0-rx-41ktimersoftd/021:18:070
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional