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2026-02-07 - 02:17
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot3.osadl.org (updated Fri Feb 06, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
81740rcu_preempt0-21swapper/010:36:590
147950730irq/31-eth0-tx-181ktimersoftd/111:45:511
81710rcu_preempt19806-21apt-get11:57:420
81710rcu_preempt0-21swapper/010:29:450
81710rcu_preempt0-21swapper/009:15:100
81710rcu_preempt0-21swapper/009:07:420
89450700irq/17-ehci_hcd6151-21lsb_release11:35:570
81700rcu_preempt0-21swapper/012:41:340
81700rcu_preempt0-21swapper/012:04:480
81700rcu_preempt0-21swapper/010:00:230
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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