You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-18 - 08:07
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot3.osadl.org (updated Wed Feb 18, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
81980rcu_preempt19-21ksoftirqd/122:38:251
81790rcu_preempt19-21ksoftirqd/123:16:381
81790rcu_preempt19-21ksoftirqd/121:47:341
81790rcu_preempt19-21ksoftirqd/100:34:131
81760rcu_preempt19-21ksoftirqd/122:16:171
81750rcu_preempt8033-21ntp_kernel_pll_23:53:221
81750rcu_preempt0-21swapper/121:59:001
81750rcu_preempt0-21swapper/021:19:470
81740rcu_preempt9939-21sh21:54:320
81740rcu_preempt29526-21munin-run22:33:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional