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2026-02-11 - 06:21
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot3.osadl.org (updated Wed Feb 11, 2026 00:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
894501040irq/17-ehci_hcd3-21ksoftirqd/000:12:580
89850740irq/17-ehci_hcd945-21usb-storage20:11:300
81740rcu_preempt20034-21sensors19:08:050
89450730irq/17-ehci_hcd41ktimersoftd/022:52:000
81720rcu_preempt0-21swapper/021:27:420
81720rcu_preempt0-21swapper/021:17:560
81710rcu_preempt28961-21sh22:32:150
81710rcu_preempt23091-21ssh00:23:020
81710rcu_preempt0-21swapper/023:06:530
81710rcu_preempt0-21swapper/022:53:030
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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