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2026-07-31 - 19:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackcslot3.osadl.org (updated Fri Jul 31, 2026 12:43:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
89950980irq/17-ehci_hcd16084-21irqstats11:43:081
81810rcu_preempt871-21diskmemload10:49:121
81760rcu_preempt23383-21sh11:57:180
89950750irq/17-ehci_hcd12406-21ssh11:36:201
81740rcu_preempt5641-21ntp_states12:23:120
81740rcu_preempt0-21swapper/012:08:030
81740rcu_preempt0-21swapper/011:48:130
81730rcu_preempt14690-21sh12:40:141
81720rcu_preempt22248-21diskmemload10:53:511
81720rcu_preempt18808-21memory08:18:090
81720rcu_preempt10304-21sensors_temp07:43:130
81710rcu_preempt585-21diskmemload10:14:331
81710rcu_preempt32431-21if_eth012:13:080
81710rcu_preempt31539-21diskmemload12:11:591
81710rcu_preempt27083-21dpkg08:53:000
81710rcu_preempt24036-21ntpq09:58:110
81710rcu_preempt11394-21ntp_states07:48:120
81710rcu_preempt0-21swapper/011:04:100
81710rcu_preempt0-21swapper/009:32:360
81700rcu_preempt871-21diskmemload12:06:241
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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