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2025-12-01 - 21:56

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackcslot3s.osadl.org (updated Mon Dec 01, 2025 12:43:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
314412321306,5sleep20-21swapper/207:06:342
314762320305,5sleep00-21swapper/007:07:000
314302318303,5sleep10-21swapper/107:06:251
313952316308,5sleep30-21swapper/307:05:593
31977992980,297cyclictest21851-21kworker/u16:1+efi_rts_wq09:40:142
31972992980,297cyclictest13962-21kworker/u16:0+efi_rts_wq11:30:140
31977992970,296cyclictest31118-21kworker/u16:3+efi_rts_wq12:08:502
31972992970,296cyclictest21851-21kworker/u16:1+efi_rts_wq07:35:110
31974992940,292cyclictest31401-21kworker/u16:0+efi_rts_wq09:50:121
31974992930,292cyclictest31401-21kworker/u16:0+efi_rts_wq07:15:131
31974992930,292cyclictest21851-21kworker/u16:1+efi_rts_wq09:15:141
31974992930,292cyclictest21851-21kworker/u16:1+efi_rts_wq09:15:131
31978992910,290cyclictest31118-21kworker/u16:3+efi_rts_wq11:50:173
31978992900,289cyclictest31401-21kworker/u16:0+efi_rts_wq10:15:133
31978992900,289cyclictest21851-21kworker/u16:1+efi_rts_wq09:00:133
31972992890,288cyclictest21851-21kworker/u16:1+efi_rts_wq08:50:120
31972992890,288cyclictest21851-21kworker/u16:1+efi_rts_wq08:15:130
31977992880,286cyclictest28622-21kworker/u16:2+efi_rts_wq10:50:132
31977992870,286cyclictest31118-21kworker/u16:3+efi_rts_wq11:35:112
31977992870,286cyclictest28622-21kworker/u16:2+efi_rts_wq11:20:132
31974992870,286cyclictest1297-21kworker/u16:1+efi_rts_wq11:15:131
31978992840,283cyclictest31401-21kworker/u16:0+efi_rts_wq07:17:473
31974992840,283cyclictest32268-21kworker/u16:2+efi_rts_wq12:05:141
31972992840,283cyclictest21851-21kworker/u16:1+efi_rts_wq09:15:140
31972992840,283cyclictest21851-21kworker/u16:1+efi_rts_wq09:15:130
31978992830,282cyclictest28622-21kworker/u16:2+efi_rts_wq10:50:133
31977992830,282cyclictest21851-21kworker/u16:1+efi_rts_wq09:55:122
31972992830,282cyclictest31401-21kworker/u16:0+efi_rts_wq10:55:140
31978992820,281cyclictest31401-21kworker/u16:0+efi_rts_wq07:50:133
31972992820,281cyclictest32268-21kworker/u16:2+efi_rts_wq12:33:540
31972992820,281cyclictest21851-21kworker/u16:1+efi_rts_wq09:35:130
31977992810,280cyclictest31401-21kworker/u16:0+efi_rts_wq10:55:142
31978992800,279cyclictest1297-21kworker/u16:1+efi_rts_wq11:10:133
31977992800,277cyclictest21851-21kworker/u16:1+efi_rts_wq08:35:152
31974992790,278cyclictest1297-21kworker/u16:1+efi_rts_wq11:03:381
31978992780,277cyclictest13962-21kworker/u16:0+efi_rts_wq11:28:423
31974992770,276cyclictest21851-21kworker/u16:1+efi_rts_wq09:45:151
31977992750,274cyclictest21851-21kworker/u16:1+efi_rts_wq09:10:122
31972992750,273cyclictest31118-21kworker/u16:3+efi_rts_wq12:25:140
31972992740,273cyclictest21851-21kworker/u16:1+efi_rts_wq08:45:160
31974992730,272cyclictest32268-21kworker/u16:2+efi_rts_wq12:30:131
31974992730,272cyclictest31401-21kworker/u16:0+efi_rts_wq10:45:131
31972992730,272cyclictest31401-21kworker/u16:0+efi_rts_wq07:55:150
31974992720,271cyclictest31401-21kworker/u16:0+efi_rts_wq09:13:161
31974992720,271cyclictest31401-21kworker/u16:0+efi_rts_wq08:10:131
31972992710,269cyclictest13962-21kworker/u16:0+efi_rts_wq11:25:130
31978992670,266cyclictest32268-21kworker/u16:2+efi_rts_wq12:15:153
31978992670,266cyclictest31401-21kworker/u16:0+efi_rts_wq08:20:143
31978992670,266cyclictest31401-21kworker/u16:0+efi_rts_wq07:10:133
31978992660,265cyclictest21851-21kworker/u16:1+efi_rts_wq07:32:503
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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