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2026-03-04 - 23:41
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackcslot3s.osadl.org (updated Wed Mar 04, 2026 12:43:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
321372321307,4sleep30-21swapper/307:06:503
322772320314,4sleep20-21swapper/207:08:372
322282318305,4sleep00-21swapper/007:07:590
321552318312,4sleep10-21swapper/107:07:041
32647993150,314cyclictest19442-21kworker/u16:3+efi_rts_wq10:30:120
32648993140,311cyclictest24547-21kworker/u16:0+efi_rts_wq12:35:111
32650993130,312cyclictest15003-21kworker/u16:2+efi_rts_wq08:36:483
32649993130,312cyclictest9199-21kworker/u16:1+efi_rts_wq12:37:332
32648993130,311cyclictest4518-21kworker/u16:4+efi_rts_wq11:10:131
32649993120,310cyclictest15003-21kworker/u16:2+efi_rts_wq09:40:122
32650993090,308cyclictest17015-21kworker/u16:0+efi_rts_wq07:25:113
32650993090,308cyclictest15003-21kworker/u16:2+efi_rts_wq08:16:453
32650993090,308cyclictest15003-21kworker/u16:2+efi_rts_wq08:00:113
32650993070,306cyclictest15003-21kworker/u16:2+efi_rts_wq07:15:133
32648993070,306cyclictest6403-21kworker/u16:3+efi_rts_wq12:20:121
32647993070,306cyclictest17015-21kworker/u16:0+efi_rts_wq08:05:110
32650993060,305cyclictest15003-21kworker/u16:2+efi_rts_wq07:35:123
32650993050,304cyclictest4518-21kworker/u16:4+efi_rts_wq11:22:213
32648993050,303cyclictest4518-21kworker/u16:4+efi_rts_wq10:57:161
32649993040,303cyclictest17015-21kworker/u16:0+efi_rts_wq08:30:122
32650993030,302cyclictest6403-21kworker/u16:3+efi_rts_wq11:55:123
32650993030,302cyclictest17015-21kworker/u16:0+efi_rts_wq09:10:133
32649993030,302cyclictest15003-21kworker/u16:2+efi_rts_wq07:40:132
32648993030,302cyclictest9199-21kworker/u16:1+efi_rts_wq12:10:111
32648993030,301cyclictest30190-21kworker/u16:1+efi_rts_wq10:47:131
32649993020,301cyclictest17015-21kworker/u16:0+efi_rts_wq10:02:042
32650993010,300cyclictest17015-21kworker/u16:0+efi_rts_wq10:32:103
32648993010,300cyclictest15003-21kworker/u16:2+efi_rts_wq09:37:001
32648993000,299cyclictest19442-21kworker/u16:3+efi_rts_wq10:35:111
32647993000,299cyclictest30190-21kworker/u16:1+efi_rts_wq11:05:120
32647993000,299cyclictest17015-21kworker/u16:0+efi_rts_wq09:30:100
32650992980,297cyclictest6403-21kworker/u16:3+efi_rts_wq12:15:113
32650992960,295cyclictest15003-21kworker/u16:2+efi_rts_wq09:16:563
32650992960,295cyclictest15003-21kworker/u16:2+efi_rts_wq08:40:123
32649992950,293cyclictest30190-21kworker/u16:1+efi_rts_wq11:20:112
32648992950,294cyclictest17015-21kworker/u16:0+efi_rts_wq10:20:111
32650992940,293cyclictest15003-21kworker/u16:2+efi_rts_wq07:45:113
32649992940,292cyclictest17015-21kworker/u16:0+efi_rts_wq10:45:112
32648992940,293cyclictest9199-21kworker/u16:1+efi_rts_wq12:00:101
32648992940,293cyclictest17015-21kworker/u16:0+efi_rts_wq08:11:441
32648992940,293cyclictest15003-21kworker/u16:2+efi_rts_wq09:42:011
32650992930,292cyclictest17015-21kworker/u16:0+efi_rts_wq08:05:113
32648992930,292cyclictest4518-21kworker/u16:4+efi_rts_wq11:30:121
32650992920,291cyclictest15003-21kworker/u16:2+efi_rts_wq08:45:113
32649992920,291cyclictest17015-21kworker/u16:0+efi_rts_wq08:20:122
32650992910,290cyclictest9199-21kworker/u16:1+efi_rts_wq12:00:113
32647992900,289cyclictest30190-21kworker/u16:1+efi_rts_wq11:20:110
32648992890,288cyclictest19442-21kworker/u16:3+efi_rts_wq10:30:121
32647992890,288cyclictest17015-21kworker/u16:0+efi_rts_wq08:35:100
32648992880,287cyclictest15003-21kworker/u16:2+efi_rts_wq09:45:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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