You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-02 - 19:13
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Wed Sep 02, 2026 12:44:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
26970312319276,28sleep00-21swapper/007:08:120
26970442301266,20sleep10-21swapper/107:08:221
283177521600,2sleep00-21swapper/011:10:340
136599540,6rtkit-daemon0-21swapper/112:27:031
136599450,3rtkit-daemon0-21swapper/112:05:071
136599430,9rtkit-daemon2889908-21ssh12:39:571
136599430,3rtkit-daemon0-21swapper/111:35:041
136599410,3rtkit-daemon0-21swapper/111:05:141
136599390,3rtkit-daemon0-21swapper/110:43:191
27145822380,4sleep00-21swapper/007:50:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional