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2026-05-15 - 01:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Thu May 14, 2026 12:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6570792263187,27sleep10-21swapper/107:08:541
6570112259184,25sleep00-21swapper/007:08:110
7020012850,5sleep00-21swapper/009:00:150
8085312660,9sleep013-21ksoftirqd/011:25:200
6700222620,4sleep0670007-21cron07:40:010
65735299623,10cyclictest804046-21apt-get11:20:131
8441042540,6chrt0-21swapper/012:15:000
179699540,4rtkit-daemon1795-21rtkit-daemon10:20:080
179699520,4rtkit-daemon1795-21rtkit-daemon11:29:241
179699510,4rtkit-daemon1795-21rtkit-daemon09:32:040
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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