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2026-07-05 - 10:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun Jul 05, 2026 00:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
21050092265184,28sleep10-21swapper/119:07:271
21037372241179,47sleep00-21swapper/019:05:200
221071921250,5sleep0161rcuc/022:20:230
179699660,3rtkit-daemon1795-21rtkit-daemon23:59:070
179699660,3rtkit-daemon1795-21rtkit-daemon19:37:150
179699640,3rtkit-daemon1795-21rtkit-daemon20:17:580
179699600,4rtkit-daemon1795-21rtkit-daemon23:36:341
179699600,4rtkit-daemon1795-21rtkit-daemon21:23:101
22874352580,4sleep10-21swapper/100:00:061
210539799582,35cyclictest2283561-21apt-get23:55:111
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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