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2026-04-06 - 01:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun Apr 05, 2026 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
25207402267191,62sleep00-21swapper/007:05:040
25224852254188,52sleep10-21swapper/107:09:511
179699580,4rtkit-daemon1795-21rtkit-daemon09:30:210
179699580,10rtkit-daemon1795-21rtkit-daemon11:12:140
26126412530,3sleep0161rcuc/010:05:190
26026572530,2sleep12602655-21ssh09:50:251
252260599530,6cyclictest2571460-21diskmemload10:34:481
179699530,3rtkit-daemon0-21swapper/011:23:050
252260599512,9cyclictest2683355-21apt-get11:45:131
252260599503,8cyclictest2708341-21apt-get12:20:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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