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2026-08-29 - 00:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Fri Aug 28, 2026 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30549612279215,49sleep00-21swapper/007:05:210
30559172262195,52sleep10-21swapper/107:07:101
31584702520,1chrt3158469-21/usr/sbin/munin10:25:160
32097792510,4sleep00-21swapper/011:40:010
136599500,4rtkit-daemon1364-21rtkit-daemon08:54:071
136599490,4rtkit-daemon1364-21rtkit-daemon08:28:331
136599480,4rtkit-daemon1364-21rtkit-daemon10:20:381
136599480,4rtkit-daemon1364-21rtkit-daemon07:54:300
136599470,3rtkit-daemon1364-21rtkit-daemon08:39:341
136599430,7rtkit-daemon3112439-21apt-get09:20:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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