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2026-05-31 - 09:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun May 31, 2026 00:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2585472264187,27sleep00-21swapper/019:06:110
2587882243202,28sleep10-21swapper/119:08:461
30641221540,4sleep1306408-21sort21:05:131
179699580,4rtkit-daemon1795-21rtkit-daemon23:29:290
179699510,3rtkit-daemon1795-21rtkit-daemon19:28:010
179699490,4rtkit-daemon1795-21rtkit-daemon19:37:460
25905299489,13cyclictest379357-21apt-get22:45:130
179699480,3rtkit-daemon1795-21rtkit-daemon22:00:401
179699470,3rtkit-daemon1795-21rtkit-daemon20:56:320
25905299466,11cyclictest443439-21sed00:15:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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