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2026-09-06 - 21:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun Sep 06, 2026 12:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32514962330287,28sleep00-21swapper/007:07:190
32514482310275,20sleep10-21swapper/107:06:511
136599600,4rtkit-daemon1364-21rtkit-daemon10:08:590
325189999573,9cyclictest3429741-21apt-get12:15:120
136599550,3rtkit-daemon1364-21rtkit-daemon10:23:460
136599540,4rtkit-daemon1364-21rtkit-daemon08:39:080
325189999532,8cyclictest3387998-21apt-get11:15:140
325189999522,6cyclictest3367062-21apt-get10:45:130
136599520,4rtkit-daemon1364-21rtkit-daemon12:07:301
325189999513,5cyclictest3363572-21apt-get10:40:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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