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2026-07-13 - 12:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Mon Jul 13, 2026 00:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
34603172270193,28sleep10-21swapper/119:07:001
34588462258181,28sleep00-21swapper/019:05:100
346078999582,40cyclictest3607064-21apt-get23:10:131
346078999562,6cyclictest3556244-21apt-get22:06:101
346078999560,5cyclictest3635003-21python323:45:021
179699560,4rtkit-daemon1795-21rtkit-daemon23:52:490
179699550,3rtkit-daemon1795-21rtkit-daemon22:55:340
346078999549,28cyclictest3491050-21expr20:20:151
346078999542,7cyclictest3619208-21apt-get23:25:151
346078999540,7cyclictest3588648-21taskset22:46:481
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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