You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-18 - 04:05
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Mon May 18, 2026 00:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
37690042263190,58sleep00-21swapper/019:08:210
37689932262221,27sleep10-21swapper/119:08:131
38404742750,1sleep03840473-21sleep21:40:000
179699670,4rtkit-daemon1795-21rtkit-daemon23:56:211
37987722660,9sleep126-21ksoftirqd/120:20:251
179699620,5rtkit-daemon3816406-21df_inode21:05:170
179699600,4rtkit-daemon1795-21rtkit-daemon00:20:001
39621692590,4sleep10-21swapper/100:24:271
179699590,3rtkit-daemon1795-21rtkit-daemon22:20:241
179699560,4rtkit-daemon1795-21rtkit-daemon22:12:040
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional