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2026-06-04 - 05:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Thu Jun 04, 2026 00:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
81528924000,7sleep10-21swapper/119:05:111
8166792270210,45sleep00-21swapper/019:06:120
96158421150,4sleep0961583-21turbostat23:40:000
179699660,5rtkit-daemon1795-21rtkit-daemon19:38:051
179699660,4rtkit-daemon1795-21rtkit-daemon22:52:501
179699590,4rtkit-daemon1795-21rtkit-daemon21:00:211
817175995712,12cyclictest857443-21apt-get21:20:100
817175995710,13cyclictest979937-21date00:05:010
817175995613,12cyclictest924433-21apt-get22:50:130
179699560,3rtkit-daemon1795-21rtkit-daemon23:43:501
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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