You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-02 - 06:23
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Wed Sep 02, 2026 00:44:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10450642260219,27sleep10-21swapper/119:09:421
10448952255192,47sleep00-21swapper/019:07:520
113975221510,3sleep00-21swapper/022:14:420
11533072680,5sleep01045224-21cyclictest22:34:100
11140552610,2sleep11114057-21ssh21:37:351
136599560,5rtkit-daemon1364-21rtkit-daemon20:50:141
136599560,3rtkit-daemon1364-21rtkit-daemon23:40:490
136599550,4rtkit-daemon1364-21rtkit-daemon23:44:581
136599550,4rtkit-daemon1364-21rtkit-daemon19:12:050
136599540,5rtkit-daemon1221713-21kworker/u8:200:16:441
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional