You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-23 - 18:57
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Tue Dec 23, 2025 12:44:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6812632274213,45sleep10-21swapper/107:05:211
6821892251183,53sleep00-21swapper/007:05:320
7898172790,4sleep10-21swapper/111:35:181
179699530,4rtkit-daemon1795-21rtkit-daemon12:21:460
179699510,4rtkit-daemon1795-21rtkit-daemon10:58:071
179699500,4rtkit-daemon1795-21rtkit-daemon09:35:201
179699500,4rtkit-daemon1795-21rtkit-daemon08:41:360
179699500,3rtkit-daemon1795-21rtkit-daemon09:20:181
68277699492,13cyclictest707972-21apt-get08:10:070
179699490,4rtkit-daemon1795-21rtkit-daemon07:12:261
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional