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2026-06-09 - 05:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Tue Jun 09, 2026 00:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5198472268188,27sleep10-21swapper/119:08:341
5199812257174,27sleep00-21swapper/019:09:590
52010499564,8cyclictest671839-21apt-get23:30:131
52010499562,7cyclictest631467-21apt-get22:35:131
179699560,4rtkit-daemon1795-21rtkit-daemon19:35:380
179699560,4rtkit-daemon1795-21rtkit-daemon19:35:370
52010499552,6cyclictest639007-21apt-get22:45:111
52010499542,6cyclictest524746-21apt-get19:20:111
52010499541,6cyclictest546233-21apt-get20:15:111
52009999543,10cyclictest594443-21apt-get21:45:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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