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2026-07-07 - 07:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Tue Jul 07, 2026 00:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3484862264188,27sleep10-21swapper/119:05:561
3488062240200,26sleep00-21swapper/019:09:210
179699590,4rtkit-daemon1795-21rtkit-daemon22:45:530
34902599583,34cyclictest404355-21apt-get21:20:150
179699580,4rtkit-daemon1795-21rtkit-daemon22:05:070
34902599560,27cyclictest516698-21packagekitd23:40:030
179699560,3rtkit-daemon0-21swapper/000:30:351
34902599552,35cyclictest544768-21apt-get00:15:120
34902599550,21cyclictest1-21systemd23:40:010
179699550,4rtkit-daemon1795-21rtkit-daemon00:22:020
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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