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2026-01-05 - 14:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Mon Jan 05, 2026 00:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
39292812263181,19sleep10-21swapper/119:05:581
39292242262222,26sleep00-21swapper/019:05:340
40345482690,4chrt26-21ksoftirqd/122:20:461
41338122640,7sleep00-21swapper/000:30:210
40867262620,1sleep04086724-21ls23:29:590
41211922600,5sleep00-21swapper/000:14:400
392976599572,6cyclictest3936369-21apt-get19:25:160
392976599542,6cyclictest4033005-21apt-get22:20:130
392976599541,6cyclictest4017665-21apt-get22:00:140
179699540,3rtkit-daemon1795-21rtkit-daemon00:14:041
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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