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2025-12-09 - 10:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Tue Dec 09, 2025 00:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9248152267185,28sleep00-21swapper/019:09:580
9247822258179,64sleep10-21swapper/119:09:401
924919991194,95cyclictest1109434-21expr00:20:160
125899760,20rtkit-daemon1257-21rtkit-daemon21:55:261
125899590,4rtkit-daemon1257-21rtkit-daemon21:50:270
125899550,3rtkit-daemon1257-21rtkit-daemon21:25:070
125899510,5rtkit-daemon939770-21apt-get19:45:121
125899490,4rtkit-daemon1257-21rtkit-daemon23:07:220
125899480,3rtkit-daemon1257-21rtkit-daemon22:21:320
125899470,4rtkit-daemon1257-21rtkit-daemon22:26:570
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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