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2026-06-29 - 09:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Mon Jun 29, 2026 00:44:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
335827023620,9sleep00-21swapper/019:05:300
335827023620,9sleep00-21swapper/019:05:300
33586182255179,26sleep10-21swapper/119:06:271
33586182255179,26sleep10-21swapper/119:06:271
342294921260,2sleep10-21swapper/121:30:141
335917499562,10cyclictest3422925-21apt-get21:30:140
179699550,3rtkit-daemon1795-21rtkit-daemon21:11:380
179699530,4rtkit-daemon1795-21rtkit-daemon19:15:590
335917499522,7cyclictest3541540-21apt-get00:15:150
179699520,3rtkit-daemon1795-21rtkit-daemon20:07:401
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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