You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-20 - 02:07
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun Apr 19, 2026 12:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22226802266193,28sleep00-21swapper/007:07:160
22226902256184,56sleep10-21swapper/107:07:241
179699650,4rtkit-daemon1795-21rtkit-daemon10:02:320
23514582540,4sleep12351456-21ssh11:00:211
179699520,4rtkit-daemon1795-21rtkit-daemon11:17:111
179699520,4rtkit-daemon1795-21rtkit-daemon11:17:101
179699510,4rtkit-daemon1795-21rtkit-daemon09:44:410
179699500,4rtkit-daemon1795-21rtkit-daemon12:19:111
179699490,3rtkit-daemon1795-21rtkit-daemon07:49:001
23052952480,4sleep02305288-21gltestperf09:55:180
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional