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2026-07-23 - 01:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Wed Jul 22, 2026 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13465022274192,28sleep10-21swapper/107:07:321
13452092254190,49sleep00-21swapper/007:05:190
1346844997672,3cyclictest1357115-21kworker/u8:207:51:260
15210072550,2sleep01521008-21cat11:45:140
14876852550,5sleep10-21swapper/111:03:541
15358042490,4sleep00-21swapper/012:03:420
106799470,20rtkit-daemon0-21swapper/110:44:441
1346848994612,6cyclictest26-21ksoftirqd/110:55:001
106799440,5rtkit-daemon1436534-21apt-get10:00:151
13613672430,4sleep00-21swapper/007:45:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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