You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-17 - 23:57
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Wed Jun 17, 2026 12:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
33083812318278,26sleep10-21swapper/107:09:131
33080472260218,28sleep00-21swapper/007:05:380
34368962600,2sleep03436897-21sh10:58:210
179699560,4rtkit-daemon1795-21rtkit-daemon11:43:220
179699560,4rtkit-daemon1795-21rtkit-daemon10:07:531
179699530,4rtkit-daemon1795-21rtkit-daemon11:00:131
179699510,4rtkit-daemon1795-21rtkit-daemon11:24:211
179699510,4rtkit-daemon1795-21rtkit-daemon07:20:560
179699500,3rtkit-daemon1795-21rtkit-daemon09:46:001
34202402480,4sleep13420244-21gltestperf10:35:191
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional