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2026-04-23 - 19:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Thu Apr 23, 2026 12:44:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27552392257180,27sleep10-21swapper/107:09:421
27543422244203,27sleep00-21swapper/007:05:270
288521921270,3sleep00-21swapper/010:55:160
27716182710,4sleep02771619-21sh07:50:000
179699640,4rtkit-daemon1795-21rtkit-daemon10:15:210
179699610,13rtkit-daemon1795-21rtkit-daemon12:08:230
29572342530,2sleep12957232-21df12:30:151
179699520,3rtkit-daemon1795-21rtkit-daemon10:09:271
179699510,3rtkit-daemon1795-21rtkit-daemon07:22:380
275539399496,13cyclictest2842557-21apt-get10:00:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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