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2026-06-21 - 10:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun Jun 21, 2026 00:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22510452323280,29sleep10-21swapper/119:09:121
22510112309267,28sleep00-21swapper/019:08:480
24320592690,4sleep00-21swapper/000:10:210
225130199635,40cyclictest2424449-21idleruntime-cro00:00:011
179699590,27rtkit-daemon2253327-21munin-node20:35:240
22720292580,4sleep00-21swapper/020:00:130
179699580,4rtkit-daemon1795-21rtkit-daemon21:25:030
225130199562,7cyclictest2352492-21apt-get22:20:141
225130199562,6cyclictest2395572-21apt-get23:20:111
225130199561,4cyclictest2409995-21apt-get23:40:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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