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2026-05-12 - 23:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Tue May 12, 2026 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24699362259186,58sleep10-21swapper/107:07:031
24700722254178,60sleep00-21swapper/007:08:320
257019421040,3sleep00-21swapper/010:16:430
179699720,4rtkit-daemon1795-21rtkit-daemon08:48:090
24787312640,6sleep12478733-21latency_hist07:30:011
179699580,4rtkit-daemon1795-21rtkit-daemon09:09:500
25480772570,3sleep10-21swapper/109:47:241
2470353995211,12cyclictest2638508-21apt-get11:50:120
179699520,4rtkit-daemon1795-21rtkit-daemon08:41:120
25631512510,4sleep00-21swapper/010:07:100
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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