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2026-06-05 - 07:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Fri Jun 05, 2026 00:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
41030972324283,27sleep10-21swapper/119:07:271
41033012314271,27sleep00-21swapper/019:09:360
5480721530,1sleep00-21swapper/023:19:520
179699740,5rtkit-daemon1795-21rtkit-daemon21:57:300
179699730,4rtkit-daemon1795-21rtkit-daemon23:30:450
179699690,4rtkit-daemon1795-21rtkit-daemon21:36:250
410345599543,33cyclictest4133945-21apt-get20:25:131
179699520,4rtkit-daemon1795-21rtkit-daemon00:21:570
410345599512,7cyclictest108895-21apt-get00:35:141
410345599512,6cyclictest4115926-21apt-get19:40:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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