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2026-08-31 - 01:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun Aug 30, 2026 12:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
121281723820,10sleep10-21swapper/107:05:251
12134852264192,26sleep00-21swapper/007:06:140
133951621600,2sleep0161rcuc/011:00:150
121398499115109,4cyclictest1194103-21kworker/u8:007:28:100
121398999108101,5cyclictest1222182-21fwupd07:28:111
121398499600,3cyclictest1408010-21sed12:40:000
13982772590,7sleep013-21ksoftirqd/012:25:170
136599560,4rtkit-daemon1364-21rtkit-daemon11:27:520
121398499551,35cyclictest1308287-21apt-get10:15:120
121398499542,32cyclictest1260434-21apt-get09:05:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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