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2026-07-25 - 07:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sat Jul 25, 2026 00:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12497782277215,47sleep10-21swapper/119:07:051
12499642269228,27sleep00-21swapper/019:09:060
106799580,6rtkit-daemon1066-21rtkit-daemon20:25:121
13419452550,2sleep01341928-21apt-get22:05:120
13558202540,3sleep00-21swapper/022:22:580
106799530,4rtkit-daemon1066-21rtkit-daemon19:28:371
106799490,4rtkit-daemon1066-21rtkit-daemon20:18:301
106799490,4rtkit-daemon1066-21rtkit-daemon00:13:071
106799460,3rtkit-daemon1066-21rtkit-daemon22:03:191
106799460,3rtkit-daemon1066-21rtkit-daemon19:59:160
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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