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2026-03-22 - 23:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun Mar 22, 2026 12:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
30055162268190,28sleep00-21swapper/007:06:520
30057032262186,61sleep10-21swapper/107:08:511
30323412460,4sleep10-21swapper/108:15:161
179699460,3rtkit-daemon0-21swapper/012:05:020
31424072430,2sleep13053855-21diskmemload11:12:121
179699430,6rtkit-daemon3171181-21ssh11:54:141
179699370,7rtkit-daemon3069013-21apt-get09:30:120
3005932993223,7cyclictest3101618-21diskstats10:15:161
3005928993023,5cyclictest3176551-21sed12:00:250
3005928993013,11cyclictest3026281-21apt-get08:00:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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