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2026-08-09 - 21:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun Aug 09, 2026 12:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13327522276216,45sleep10-21swapper/107:06:491
13326642260192,52sleep00-21swapper/007:05:530
108999650,3rtkit-daemon1088-21rtkit-daemon12:05:181
108999630,4rtkit-daemon1088-21rtkit-daemon07:59:141
133318799613,8cyclictest1412747-21apt-get09:50:140
108999570,4rtkit-daemon1088-21rtkit-daemon10:36:431
133318799563,7cyclictest1368272-21apt-get08:35:150
133318799562,13cyclictest1483926-21apt-get11:25:160
108999550,24rtkit-daemon1085-21sendmail-mta08:45:141
14124982540,4sleep10-21swapper/109:50:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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