You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-09 - 21:40
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sat May 09, 2026 12:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9850632263182,19sleep10-21swapper/107:08:361
9836812251183,52sleep00-21swapper/007:05:200
10414242730,3chrt0-21swapper/009:20:150
11824332630,3sleep10-21swapper/112:27:421
179699600,3rtkit-daemon1795-21rtkit-daemon10:51:091
179699600,3rtkit-daemon1795-21rtkit-daemon10:51:091
9897622590,4sleep1989735-21sendmail07:20:011
9861982590,5sleep00-21swapper/007:10:210
179699540,5rtkit-daemon1795-21rtkit-daemon12:18:110
179699520,4rtkit-daemon1795-21rtkit-daemon11:25:560
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional