You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-12-02 - 23:10
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Tue Dec 02, 2025 12:44:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9387092258183,59sleep10-21swapper/107:08:481
9386602257214,28sleep00-21swapper/007:08:180
125899770,4rtkit-daemon1257-21rtkit-daemon11:32:501
125899760,4rtkit-daemon1257-21rtkit-daemon10:27:141
93899399623,8cyclictest1105879-40unattended-upgr11:45:321
93899399623,8cyclictest1059884-21apt-get10:45:151
93899399623,11cyclictest1006923-21apt-get09:35:141
93899399613,8cyclictest987188-21apt-get09:10:161
93899399602,9cyclictest1063690-21apt-get10:50:121
10896492580,4sleep11089282-21python311:25:021
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional