You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-11 - 00:20
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun May 10, 2026 12:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
887472266207,45sleep00-21swapper/007:06:300
887132261183,43sleep10-21swapper/107:06:091
15132921550,4sleep00-21swapper/009:25:480
179699690,3rtkit-daemon1795-21rtkit-daemon09:48:321
2890472630,4sleep00-21swapper/012:30:180
1693102600,1sleep00-21swapper/009:50:170
2836912590,4sleep10-21swapper/112:23:511
2836912590,4sleep10-21swapper/112:23:501
179699560,4rtkit-daemon1795-21rtkit-daemon08:44:411
179699540,4rtkit-daemon1795-21rtkit-daemon12:16:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional