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2025-12-14 - 17:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Sun Dec 14, 2025 12:44:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19832452312269,29sleep00-21swapper/007:08:500
19831632259192,51sleep10-21swapper/107:07:561
179699580,7rtkit-daemon1795-21rtkit-daemon09:40:120
179699540,3rtkit-daemon1795-21rtkit-daemon10:05:240
198354199532,32cyclictest1983865-40apt-check07:10:120
179699530,3rtkit-daemon1795-21rtkit-daemon09:51:210
198354199521,32cyclictest2034371-21apt-get09:15:130
179699510,3rtkit-daemon1795-21rtkit-daemon08:53:570
198354199491,32cyclictest2042596-21apt-get09:35:140
198354199491,31cyclictest2040651-21apt-get09:30:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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