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2025-12-26 - 05:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot4.osadl.org (updated Fri Dec 26, 2025 00:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
759182269210,45sleep00-21swapper/019:05:280
766062249178,56sleep10-21swapper/119:07:121
2212132990,4sleep10-21swapper/123:10:391
179699790,3rtkit-daemon0-21swapper/022:13:070
1756412640,4sleep10-21swapper/122:13:031
76976995718,9cyclictest1-21systemd23:05:010
76976995717,14cyclictest142586-21/usr/sbin/munin21:30:240
76976995618,9cyclictest285674-21ssh00:35:260
76976995617,8cyclictest1-21systemd23:50:010
76976995616,11cyclictest125007-21ssh21:09:590
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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