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2025-12-31 - 18:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot4.osadl.org (updated Wed Dec 31, 2025 12:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
153190624300,32sleep00-21swapper/007:10:000
15317532274212,48sleep10-21swapper/107:08:301
16144712630,4sleep10-21swapper/109:52:241
179699620,5rtkit-daemon66950irq/132-enp2s011:46:261
179699570,3rtkit-daemon0-21swapper/107:45:111
179699560,5rtkit-daemon1565924-21chrt08:33:391
179699550,3rtkit-daemon0-21swapper/108:25:581
179699550,3rtkit-daemon0-21swapper/108:16:461
179699550,3rtkit-daemon0-21swapper/107:55:071
179699540,4rtkit-daemon1795-21rtkit-daemon09:17:291
179699540,3rtkit-daemon0-21swapper/108:43:181
179699530,3rtkit-daemon0-21swapper/111:35:101
179699530,3rtkit-daemon0-21swapper/111:17:271
179699530,3rtkit-daemon0-21swapper/108:53:181
179699530,3rtkit-daemon0-21swapper/107:21:391
179699520,4rtkit-daemon1795-21rtkit-daemon12:36:591
179699520,4rtkit-daemon1795-21rtkit-daemon10:30:161
179699520,4rtkit-daemon1795-21rtkit-daemon10:09:071
179699520,4rtkit-daemon1795-21rtkit-daemon09:10:561
179699520,3rtkit-daemon1795-21rtkit-daemon09:27:561
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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