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2025-05-09 - 05:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot4.osadl.org (updated Fri May 09, 2025 00:45:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27748022323281,28sleep10-21swapper/119:07:551
27737852275218,43sleep00-21swapper/019:05:220
28906732720,4sleep00-21swapper/022:39:110
125899720,6rtkit-daemon2967045-21sort00:20:250
125899650,3rtkit-daemon1257-21rtkit-daemon23:25:501
29252782640,4chrt0-21swapper/023:25:000
125899570,4rtkit-daemon1257-21rtkit-daemon22:01:470
125899560,3rtkit-daemon1257-21rtkit-daemon23:28:110
125899550,4rtkit-daemon1257-21rtkit-daemon00:02:490
125899510,4rtkit-daemon1257-21rtkit-daemon21:47:261
125899510,22rtkit-daemon2775121-21cyclictest19:51:540
125899500,4rtkit-daemon1257-21rtkit-daemon21:34:301
125899500,3rtkit-daemon1257-21rtkit-daemon22:19:390
29372172480,4sleep12937215-21gltestperf23:40:181
29146162470,5chrt2914577-21fschecks_time23:10:310
125899470,4rtkit-daemon1257-21rtkit-daemon20:07:370
125899470,4rtkit-daemon1257-21rtkit-daemon20:01:560
125899470,20rtkit-daemon2775121-21cyclictest22:13:020
28807802440,2sleep12880008-21/usr/sbin/munin22:25:211
125899440,3rtkit-daemon1257-21rtkit-daemon22:07:191
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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