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2026-05-15 - 09:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot4.osadl.org (updated Fri May 15, 2026 00:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
23043732270186,29sleep00-21swapper/019:05:220
23059682239198,27sleep10-21swapper/119:08:451
23850672600,9sleep126-21ksoftirqd/121:47:551
179699530,4rtkit-daemon1795-21rtkit-daemon23:40:081
179699530,4rtkit-daemon1795-21rtkit-daemon21:33:460
179699510,3rtkit-daemon1795-21rtkit-daemon21:42:500
179699510,3rtkit-daemon1795-21rtkit-daemon21:14:050
179699490,4rtkit-daemon1795-21rtkit-daemon22:04:591
179699470,4rtkit-daemon1795-21rtkit-daemon19:26:511
23392282460,6sleep02339230-21gpgv20:30:020
23210302460,5sleep02320860-21python319:45:010
25045752450,4sleep10-21swapper/100:29:131
179699410,5rtkit-daemon2422156-21seq22:38:100
230622099397,6cyclictest13-21ksoftirqd/022:50:000
179699390,3rtkit-daemon1795-21rtkit-daemon21:17:291
179699390,3rtkit-daemon0-21swapper/021:45:440
230622099387,6cyclictest13-21ksoftirqd/022:05:010
179699380,5rtkit-daemon2329033-21chrt20:04:561
179699380,3rtkit-daemon0-21swapper/119:35:191
230622099374,5cyclictest13-21ksoftirqd/021:25:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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