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2026-04-27 - 07:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot4.osadl.org (updated Mon Apr 27, 2026 00:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
17422862295253,26sleep10-21swapper/119:08:551
17423002261186,60sleep00-21swapper/019:09:040
18860472610,4sleep10-21swapper/123:11:101
18444402600,3sleep0161rcuc/022:17:050
17841282580,4sleep01784126-21seq20:50:160
179699570,4rtkit-daemon1795-21rtkit-daemon00:37:450
179699550,4rtkit-daemon1795-21rtkit-daemon23:34:051
19368732520,4sleep00-21swapper/000:19:230
179699480,4rtkit-daemon1795-21rtkit-daemon20:29:261
179699470,4rtkit-daemon1795-21rtkit-daemon22:47:190
179699470,3rtkit-daemon1795-21rtkit-daemon20:11:181
179699470,3rtkit-daemon1795-21rtkit-daemon19:52:261
179699460,3rtkit-daemon1795-21rtkit-daemon00:31:491
18071642440,4sleep0161rcuc/021:28:470
174263299420,39cyclictest1851073-21ntp_states22:25:221
18817022400,4chrt0-21swapper/023:05:250
179699400,4rtkit-daemon1791591-21diskmemload23:26:211
179699390,5rtkit-daemon1791591-21diskmemload23:57:561
179699390,4rtkit-daemon1795-21rtkit-daemon20:10:011
179699390,3rtkit-daemon0-21swapper/020:43:060
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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