You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-07 - 19:01
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot2.osadl.org (updated Thu May 07, 2026 12:45:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139591243198,34phc2sys0-21swapper/307:05:583
110282226198,18sleep00-21swapper/007:09:590
109672206172,22sleep20-21swapper/207:09:132
109392205171,22sleep10-21swapper/107:08:511
2774321350,5sleep31147599cyclictest07:40:263
11475996128,10cyclictest41-21ksoftirqd/310:35:013
11475995830,8cyclictest41-21ksoftirqd/311:45:263
11475995821,7cyclictest41-21ksoftirqd/308:55:093
11475995619,11cyclictest41-21ksoftirqd/309:37:533
11475995526,9cyclictest41-21ksoftirqd/309:05:203
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional