You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-27 - 21:25
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot2.osadl.org (updated Mon Jul 27, 2026 12:45:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139591232163,23phc2sys0-21swapper/307:09:423
3048022200,9sleep10-21swapper/107:05:151
321962205171,23sleep20-21swapper/207:06:522
321672205171,22sleep00-21swapper/007:06:300
139291780,1ptp4l401ktimersoftd/309:51:563
32739996628,7cyclictest33-21ksoftirqd/208:20:162
139291650,1ptp4l401ktimersoftd/312:35:243
32739996427,8cyclictest33-21ksoftirqd/208:50:012
32739996416,6cyclictest33-21ksoftirqd/208:45:012
32737996410,16cyclictest1308-21runrttasks08:35:080
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional