You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-10-25 - 19:34
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot2.osadl.org (updated Sat Oct 25, 2025 12:45:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
259642224161,52sleep10-21swapper/107:05:071
279312207173,22sleep20-21swapper/207:07:572
279992204171,22sleep30-21swapper/307:08:513
278472204169,23sleep00-21swapper/007:06:510
266612630,7sleep3401ktimersoftd/308:10:283
28387995936,3cyclictest25-21ksoftirqd/109:15:161
28387995921,7cyclictest25-21ksoftirqd/109:10:011
136591590,1ptp4l401ktimersoftd/308:55:153
173792580,7sleep32838999cyclictest11:15:213
28387995723,8cyclictest25-21ksoftirqd/111:55:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional