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2025-12-24 - 19:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot2.osadl.org (updated Wed Dec 24, 2025 12:45:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139591231168,51phc2sys0-21swapper/307:07:523
37412206171,23sleep10-21swapper/107:06:201
38312205172,22sleep20-21swapper/207:07:302
39572204170,23sleep00-21swapper/007:09:080
1047321210,4sleep3432799cyclictest08:30:503
432699679,16cyclictest9724-21latency11:50:192
156412660,1sleep00-21swapper/008:40:170
139291660,1ptp4l401ktimersoftd/309:00:293
139291660,1ptp4l401ktimersoftd/309:00:283
432699656,12cyclictest28510-21sort09:05:252
432699649,10cyclictest14220-21unixbench_multi10:50:272
432699618,16cyclictest2521-21gnome-shell10:05:582
432699617,16cyclictest8740-21missed_timers08:25:222
432699608,9cyclictest22105-21processes12:15:222
432699607,11cyclictest32559-21sed09:15:202
432699604,16cyclictest0-21swapper/210:55:132
432699597,9cyclictest3823-21wc11:40:002
432699594,18cyclictest0-21swapper/209:10:142
432699594,18cyclictest0-21swapper/208:10:132
432699587,8cyclictest9118-21ps10:40:232
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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