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2026-06-13 - 10:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot2.osadl.org (updated Sat Jun 13, 2026 00:45:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139591232165,22phc2sys0-21swapper/319:09:573
221842208173,23sleep10-21swapper/119:08:261
221532205171,23sleep20-21swapper/219:08:032
219842205171,22sleep00-21swapper/019:05:560
36221500,3sleep32260199cyclictest19:30:173
2260099701,30cyclictest10186-21taskset00:17:202
2260099701,28cyclictest27125-21taskset19:19:252
2260099681,29cyclictest16254-21chrt20:03:012
2260099680,3cyclictest12845-21if_enp4s022:10:172
2260099600,4cyclictest1540-21taskset19:30:332
270192590,2sleep30-21swapper/322:40:133
2259899596,11cyclictest18380-21apt-key23:30:010
2259899585,16cyclictest8691-21cat23:10:010
2259899573,18cyclictest0-21swapper/022:55:200
2260099561,3cyclictest32494-21chrt21:45:002
2260099561,3cyclictest26315-21taskset22:37:262
2260099560,2cyclictest61062sleep223:02:592
2259899565,17cyclictest31447-21cut22:50:010
2259899564,10cyclictest21889-21latency_hist22:30:010
2260099553,18cyclictest0-21swapper/219:21:382
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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