You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-11-20 - 15:57
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot2.osadl.org (updated Thu Nov 20, 2025 12:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
136691218172,34phc2sys0-21swapper/307:06:043
148102207174,22sleep10-21swapper/107:08:541
148392203170,22sleep00-21swapper/007:09:180
145822203170,22sleep20-21swapper/207:05:582
591821530,7sleep21519599cyclictest07:55:242
1490028969,11sleep30-21swapper/307:10:013
136591730,2ptp4l0-21swapper/310:12:313
67202650,2sleep00-21swapper/009:05:220
209552630,7sleep21519599cyclictest09:35:172
136591610,1ptp4l401ktimersoftd/311:37:043
136591550,1ptp4l401ktimersoftd/311:01:273
136591540,1ptp4l401ktimersoftd/308:45:133
136591520,1ptp4l391rcuc/311:56:013
218442510,1sleep10-21swapper/108:30:181
136591510,1ptp4l391rcuc/310:40:493
166242480,2sleep10-21swapper/110:35:131
136591420,0ptp4l401ktimersoftd/312:10:203
136591410,0ptp4l401ktimersoftd/311:20:243
136591410,0ptp4l401ktimersoftd/308:59:573
15193993833,3cyclictest20709-21cron08:30:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional