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2026-05-27 - 01:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot2.osadl.org (updated Tue May 26, 2026 12:45:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
160542208173,23sleep30-21swapper/307:07:053
160032206173,22sleep20-21swapper/207:06:242
161862205171,22sleep00-21swapper/007:08:470
159952205172,22sleep10-21swapper/107:06:191
1886521730,3sleep21658399cyclictest11:45:122
139291720,1ptp4l391rcuc/308:40:143
1658199641,31cyclictest14156-21seq10:25:240
1658199641,21cyclictest6511-21irqrtprio12:25:170
1658199630,23cyclictest6495-21turbostat.cron11:19:540
1658199583,22cyclictest1308-21runrttasks12:38:460
1658199581,25cyclictest27329-21/usr/sbin/munin07:30:230
1658199561,23cyclictest6320-21taskset09:01:410
1658199560,23cyclictest8640-21seq09:06:030
1658199560,22cyclictest5130-21chrt07:51:230
1658199560,22cyclictest11066-21seq09:11:500
103302560,2sleep30-21swapper/310:20:003
1658199550,24cyclictest26627-21seq10:53:560
1658199550,21cyclictest8254-21taskset08:00:080
1658199544,26cyclictest30507-21taskset07:39:060
1658199544,26cyclictest30507-21taskset07:39:060
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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