You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-22 - 23:00
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot2.osadl.org (updated Wed Apr 22, 2026 12:45:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
45372232167,20sleep20-21swapper/207:06:192
139591227163,52phc2sys0-21swapper/307:06:323
45042206172,22sleep10-21swapper/107:05:541
45282204170,22sleep00-21swapper/007:06:130
1607321630,7sleep1512099cyclictest08:40:011
139591162122,14phc2sys0-21swapper/307:10:013
1761121340,6sleep1512099cyclictest12:05:131
95052730,2sleep20-21swapper/208:25:172
5122996610,54cyclictest19285-21kworker/3:009:37:263
135291660,2getstats0-21swapper/310:00:113
5122996410,52cyclictest19285-21kworker/3:011:16:053
5122995411,40cyclictest19285-21kworker/3:011:07:253
5122995411,40cyclictest19285-21kworker/3:011:07:253
41298470,11rtkit-daemon0-21swapper/207:20:142
512299460,3cyclictest20225-21cpu09:55:123
139291430,1ptp4l391rcuc/307:15:223
139291430,0ptp4l401ktimersoftd/311:02:043
41298410,10rtkit-daemon0-21swapper/111:53:161
139291410,0ptp4l401ktimersoftd/311:35:303
139291400,21ptp4l512299cyclictest08:00:243
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional