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2025-12-27 - 21:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot2.osadl.org (updated Sat Dec 27, 2025 12:45:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139591207175,21phc2sys0-21swapper/307:09:053
238692206172,23sleep20-21swapper/207:08:382
239182203169,23sleep10-21swapper/107:09:171
237162203170,22sleep00-21swapper/007:06:390
317822860,2sleep10-21swapper/109:40:001
2427199587,7cyclictest10171-21basename08:55:011
228782580,5sleep3391rcuc/311:35:143
2427199577,6cyclictest29149-21apt-config07:20:011
211862570,4sleep221185-21systemctl12:40:002
2427199567,6cyclictest31661-21sed11:50:251
139291560,1ptp4l401ktimersoftd/307:35:193
2427199537,7cyclictest3086-21cat10:55:001
2427199537,17cyclictest30609-21latency_hist08:30:011
2427199536,6cyclictest25783-21latency_hist10:35:011
2427199535,7cyclictest20259-21ptp4l-jitter10:20:271
2427199530,11cyclictest5900-21df_abs11:00:161
80212520,4sleep00-21swapper/007:40:240
2427199524,5cyclictest4377-21latency_hist09:50:001
24270995219,6cyclictest9-21ksoftirqd/007:25:000
24270995216,4cyclictest9-21ksoftirqd/007:40:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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