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2026-04-04 - 11:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot2.osadl.org (updated Sat Apr 04, 2026 00:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139591229163,22phc2sys0-21swapper/319:07:253
274162207174,21sleep00-21swapper/019:07:580
274952204172,22sleep20-21swapper/219:09:012
272182203169,22sleep10-21swapper/119:05:291
3250821720,6sleep02786499cyclictest19:20:010
1855121650,5sleep22786699cyclictest00:25:182
27864997212,17cyclictest7274-21sed21:50:010
27864996912,10cyclictest22146-21sed23:25:180
27866996827,5cyclictest33-21ksoftirqd/200:20:252
27864996711,15cyclictest16427-21latency_hist23:15:000
27864996615,10cyclictest23268-21expr21:15:140
27864996614,9cyclictest10271-21irqrtprio23:00:190
27864996610,16cyclictest23764-21mailstats00:35:250
27866996531,4cyclictest33-21ksoftirqd/221:50:182
27864996514,10cyclictest3913-21date20:35:010
27864996510,10cyclictest11518-21cat00:10:170
27866996431,6cyclictest33-21ksoftirqd/223:05:002
2786499649,12cyclictest3026-21sort23:55:010
27864996413,11cyclictest14020-21cut20:55:140
27864996410,11cyclictest31842-21grep20:25:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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