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2025-12-31 - 12:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot2.osadl.org (updated Wed Dec 31, 2025 00:45:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
78422217168,22sleep20-21swapper/219:07:542
139591213168,33phc2sys0-21swapper/319:09:533
76882204171,22sleep00-21swapper/019:05:590
58732202170,21sleep10-21swapper/119:05:071
139591150123,15phc2sys0-21swapper/319:10:013
196092690,5sleep1231rcuc/122:55:181
139291690,0ptp4l391rcuc/321:45:203
8297996214,21cyclictest401-21sed23:20:260
73472620,4sleep37348-21fschecks_time20:15:193
165862610,2sleep116570-21kernelversion21:40:201
111932580,3sleep311198-21timerandwakeup22:35:253
139291570,1ptp4l401ktimersoftd/322:26:453
139291550,1ptp4l401ktimersoftd/323:56:033
139291530,1ptp4l401ktimersoftd/320:12:213
829899460,44cyclictest0-21swapper/121:21:051
139291460,0ptp4l401ktimersoftd/322:32:023
8298994540,3cyclictest15215-21ls19:25:001
139291430,0ptp4l401ktimersoftd/320:06:403
8300994233,7cyclictest41-21ksoftirqd/323:25:013
41298420,2rtkit-daemon0-21swapper/223:44:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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