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2026-07-11 - 13:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot2.osadl.org (updated Sat Jul 11, 2026 00:45:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
211582238171,22sleep20-21swapper/219:06:042
214362207173,22sleep10-21swapper/119:09:411
214332207173,22sleep30-21swapper/319:09:393
191052203171,21sleep00-21swapper/019:05:010
1528121430,6sleep32175699cyclictest20:01:253
1395918363,11phc2sys0-21swapper/319:10:013
8742630,1sleep20-21swapper/222:55:192
253242560,3sleep22175599cyclictest23:45:242
179742550,2sleep10-21swapper/122:25:011
139291530,1ptp4l401ktimersoftd/323:11:253
139291520,1ptp4l401ktimersoftd/322:08:153
139291480,1ptp4l391rcuc/300:00:513
21753994539,3cyclictest32443-21latency_hist20:40:010
139291440,0ptp4l401ktimersoftd/321:10:533
139291430,0ptp4l401ktimersoftd/300:27:403
139291420,0ptp4l401ktimersoftd/321:40:273
21756994136,3cyclictest41-21ksoftirqd/322:20:013
139291410,0ptp4l401ktimersoftd/319:55:133
139291410,0ptp4l401ktimersoftd/319:55:133
21756994034,3cyclictest41-21ksoftirqd/320:15:183
21756993935,3cyclictest41-21ksoftirqd/323:40:003
21756993933,4cyclictest41-21ksoftirqd/321:58:223
21756993933,4cyclictest41-21ksoftirqd/300:31:563
21756993933,4cyclictest18820-21kworker/3:020:05:133
21755993930,6cyclictest33-21ksoftirqd/221:45:002
21754993931,5cyclictest25-21ksoftirqd/100:02:001
21756993832,4cyclictest41-21ksoftirqd/321:28:143
21756993831,4cyclictest41-21ksoftirqd/322:54:183
21755993832,4cyclictest33-21ksoftirqd/219:37:092
21755993826,10cyclictest33-21ksoftirqd/221:00:142
2175499381,34cyclictest32162-21awk22:55:001
21753993832,4cyclictest9-21ksoftirqd/023:37:240
21756993732,3cyclictest41-21ksoftirqd/323:17:003
21756993732,3cyclictest41-21ksoftirqd/321:04:503
21756993731,4cyclictest41-21ksoftirqd/322:32:253
21756993731,4cyclictest41-21ksoftirqd/321:15:513
21755993732,3cyclictest33-21ksoftirqd/220:00:002
21755993732,3cyclictest33-21ksoftirqd/220:00:002
21755993731,4cyclictest33-21ksoftirqd/223:08:182
21755993731,4cyclictest33-21ksoftirqd/222:19:312
21755993731,4cyclictest33-21ksoftirqd/220:04:052
21755993731,3cyclictest33-21ksoftirqd/220:10:002
21754993731,4cyclictest25-21ksoftirqd/121:07:291
21754993731,3cyclictest25-21ksoftirqd/100:15:121
21754993730,4cyclictest25-21ksoftirqd/122:09:041
21754993730,4cyclictest25-21ksoftirqd/119:45:581
21753993732,3cyclictest9-21ksoftirqd/019:53:240
21753993730,4cyclictest9-21ksoftirqd/022:05:120
21756993631,3cyclictest41-21ksoftirqd/323:40:203
21756993631,3cyclictest41-21ksoftirqd/320:45:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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