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2026-04-26 - 20:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rackdslot4.osadl.org (updated Sun Apr 26, 2026 12:45:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
310942203170,22sleep20-21swapper/207:06:222
311552202170,22sleep10-21swapper/107:07:091
311452202169,22sleep30-21swapper/307:07:033
312312199166,22sleep00-21swapper/007:08:090
2555821620,2sleep00-21swapper/012:20:260
211112660,2sleep10-21swapper/108:55:251
138491630,8ptp4l401ktimersoftd/309:18:313
87722590,1sleep20-21swapper/208:30:262
3167699585,6cyclictest4075-21sort07:20:012
138491580,1ptp4l401ktimersoftd/312:02:523
3167699541,9cyclictest9754-21tune2fs10:45:162
138491540,1ptp4l401ktimersoftd/310:52:153
3167699521,9cyclictest9492-21/usr/sbin/munin09:40:192
3167699520,10cyclictest4624-21cstates10:35:142
3138125234,11sleep30-21swapper/307:10:013
3167699510,17cyclictest20820-21systemctl10:00:242
3167699510,11cyclictest22166-21irqrtprio12:15:192
3167699510,10cyclictest26894-21cat09:10:002
3167699501,9cyclictest15228-21fschecks_count08:45:162
3167699500,9cyclictest30884-21sed11:25:272
3167699493,7cyclictest12214-21cpuspeed_turbos08:40:142
3167699491,11cyclictest25248-21sed08:00:202
85812480,1sleep00-21swapper/008:30:240
3167699484,6cyclictest2443-21cat11:35:182
3167699482,10cyclictest19893-21expr08:55:142
3167699481,9cyclictest17212-21cstates09:55:122
3167699480,15cyclictest24927-21cat10:10:172
3167699480,10cyclictest18735-21sed08:50:272
3167599481,45cyclictest0-21swapper/112:32:441
3167699475,6cyclictest26437-21grep11:20:002
3167699470,10cyclictest29598-21cat09:15:142
31675994713,5cyclictest26129-21kworker/1:008:33:041
31677994530,12cyclictest41-21ksoftirqd/310:30:013
3167699451,5cyclictest0-21swapper/209:35:002
3167699444,7cyclictest33-21ksoftirqd/211:05:252
31674994439,3cyclictest18724-21cron12:10:000
138491440,1ptp4l401ktimersoftd/308:35:133
3167699430,5cyclictest0-21swapper/210:40:232
31675994338,3cyclictest16916-21sh08:50:001
31675994317,24cyclictest27296-21kworker/1:012:38:241
138491430,0ptp4l401ktimersoftd/310:35:173
3167699420,9cyclictest645-21cat09:20:202
3167699420,14cyclictest14226-21latency_hist09:50:002
135191420,1getstats0-21swapper/312:06:013
3167699403,5cyclictest10231-21meminfo11:50:202
31676994034,3cyclictest217252sleep211:10:132
3167699400,7cyclictest27240-21hddtemp_smartct08:05:172
31677993935,2cyclictest41-21ksoftirqd/310:45:003
31677993934,3cyclictest41-21ksoftirqd/311:00:013
31677993934,3cyclictest41-21ksoftirqd/307:30:003
3167699392,5cyclictest3219-21meminfo09:25:192
31675993915,22cyclictest0-21swapper/110:24:131
31674993934,3cyclictest9-21ksoftirqd/007:46:260
31677993833,3cyclictest41-21ksoftirqd/308:20:003
31677993833,3cyclictest41-21ksoftirqd/307:40:003
31677993833,3cyclictest41-21ksoftirqd/307:40:003
31677993833,2cyclictest41-21ksoftirqd/309:35:013
31677993832,4cyclictest41-21ksoftirqd/310:24:473
31677993832,3cyclictest41-21ksoftirqd/310:05:013
3167699382,5cyclictest33-21ksoftirqd/210:20:162
3167699381,6cyclictest10491-21irqrtprio08:35:172
3167699380,7cyclictest22264-21diskstats10:05:162
3167699380,6cyclictest8131-21meminfo09:35:212
3167699380,6cyclictest31002-21users08:10:272
3167699380,6cyclictest31002-21users08:10:262
3167699380,6cyclictest2982-21irqstats08:20:192
3167699380,6cyclictest17260-21df_inode11:00:152
3167699380,10cyclictest22553-21diskstats09:00:132
3167599382,33cyclictest11446-21perf07:35:001
138491380,1ptp4l401ktimersoftd/310:32:383
138491380,0ptp4l401ktimersoftd/308:25:233
31677993733,3cyclictest41-21ksoftirqd/312:30:183
31677993732,3cyclictest41-21ksoftirqd/311:40:003
31677993732,3cyclictest41-21ksoftirqd/311:15:183
31677993732,3cyclictest41-21ksoftirqd/309:45:203
31677993732,3cyclictest41-21ksoftirqd/309:25:003
31677993732,3cyclictest41-21ksoftirqd/307:50:203
31677993731,3cyclictest41-21ksoftirqd/310:10:123
31677993731,3cyclictest41-21ksoftirqd/308:35:013
31677993723,12cyclictest41-21ksoftirqd/310:20:003
3167699376,6cyclictest33-21ksoftirqd/212:10:192
3167699375,6cyclictest33-21ksoftirqd/212:20:252
3167699370,6cyclictest374-21sensors_temp12:35:252
3167699370,6cyclictest32173-21diskstats10:25:162
31675993731,4cyclictest25-21ksoftirqd/108:39:201
31675993714,22cyclictest0-21swapper/111:30:431
31677993631,3cyclictest41-21ksoftirqd/307:20:183
31677993630,4cyclictest41-21ksoftirqd/307:56:163
31677993630,3cyclictest41-21ksoftirqd/312:10:193
31677993630,3cyclictest41-21ksoftirqd/308:55:193
3167699366,6cyclictest33-21ksoftirqd/210:15:182
31676993630,4cyclictest33-21ksoftirqd/207:36:592
31676993630,4cyclictest33-21ksoftirqd/207:36:592
31676993629,4cyclictest33-21ksoftirqd/211:50:012
3167699362,5cyclictest33-21ksoftirqd/208:18:142
31675993630,4cyclictest25-21ksoftirqd/111:58:341
31674993630,4cyclictest9-21ksoftirqd/009:37:560
31674993629,4cyclictest9-21ksoftirqd/010:30:000
50798350,2rtkit-daemon0-21swapper/112:12:031
31677993532,2cyclictest41-21ksoftirqd/308:05:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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