You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-22 - 16:35
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Sun Feb 22, 2026 12:45:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
138591206172,23phc2sys0-21swapper/307:07:383
161562202170,21sleep20-21swapper/207:09:422
160352202169,21sleep00-21swapper/007:08:150
159862201167,23sleep10-21swapper/107:07:351
138591162123,13phc2sys0-21swapper/307:10:013
138591162123,13phc2sys0-21swapper/307:10:003
2139921610,7sleep21647399cyclictest10:35:012
1188021560,5sleep21647399cyclictest08:05:132
16474996824,4cyclictest41-21ksoftirqd/310:50:183
16474996432,4cyclictest41-21ksoftirqd/307:50:273
16474996427,9cyclictest41-21ksoftirqd/308:00:003
115512640,3sleep111555-21latency_hist08:05:001
16474996228,9cyclictest41-21ksoftirqd/309:25:273
16474996131,4cyclictest41-21ksoftirqd/309:05:193
16474996127,5cyclictest41-21ksoftirqd/310:45:253
16474996121,10cyclictest41-21ksoftirqd/307:30:183
16474995930,3cyclictest41-21ksoftirqd/310:40:143
16474995928,8cyclictest41-21ksoftirqd/309:50:153
16474995927,11cyclictest41-21ksoftirqd/309:00:273
16474995923,9cyclictest41-21ksoftirqd/307:25:243
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional