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2026-05-25 - 02:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Sun May 24, 2026 12:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
182242206172,22sleep00-21swapper/007:09:310
182242206172,22sleep00-21swapper/007:09:310
180632204171,22sleep20-21swapper/207:07:332
180632204171,22sleep20-21swapper/207:07:332
180592203169,22sleep30-21swapper/307:07:303
180592203169,22sleep30-21swapper/307:07:303
182302201168,22sleep10-21swapper/107:09:381
182302201168,22sleep10-21swapper/107:09:381
1733521390,4sleep11855499cyclictest12:30:211
1855599680,30cyclictest1646-21cat08:45:012
1855599680,30cyclictest1646-21cat08:45:002
1855599680,21cyclictest1-21systemd10:45:252
1855599651,21cyclictest17853-21ptp4l08:10:232
1855599640,25cyclictest24671-21/usr/sbin/munin07:20:202
1855599640,23cyclictest10278-21cat09:00:212
1855599631,19cyclictest0-21swapper/207:40:232
1855599620,22cyclictest30754-21awk09:40:262
138491620,1ptp4l401ktimersoftd/307:22:053
1855599580,21cyclictest223-21systemd-journal10:33:222
138491570,1ptp4l401ktimersoftd/308:50:103
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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