You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-10-17 - 10:16
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Fri Oct 17, 2025 00:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
326582204171,22sleep10-21swapper/119:06:241
327652203169,23sleep30-21swapper/319:07:463
326392200167,21sleep20-21swapper/219:06:102
327622196161,23sleep00-21swapper/019:07:440
134991800,7ptp4l80399cyclictest22:50:283
134991790,1ptp4l0-21swapper/319:47:383
134991750,1ptp4l0-21swapper/320:20:283
134991730,8ptp4l80399cyclictest23:40:273
134991730,7ptp4l80399cyclictest21:40:283
134991730,7ptp4l80399cyclictest21:40:283
134991720,1ptp4l391rcuc/323:10:353
134991720,1ptp4l391rcuc/321:10:183
802996418,7cyclictest33-21ksoftirqd/220:39:592
188502640,6sleep180199cyclictest20:54:591
134991640,1ptp4l6501-1kworker/3:0H19:30:073
134991580,1ptp4l391rcuc/323:24:063
134991580,1ptp4l391rcuc/322:10:283
47512570,5sleep380399cyclictest19:20:153
134991570,1ptp4l391rcuc/320:52:453
134991570,1ptp4l391rcuc/300:15:173
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional