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2026-05-22 - 12:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Fri May 22, 2026 00:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
138591229200,19phc2sys0-21swapper/319:05:583
89362211145,22sleep20-21swapper/219:08:412
88572201167,23sleep00-21swapper/019:07:400
88532200167,22sleep10-21swapper/119:07:361
2937321470,7sleep1938699cyclictest23:05:131
1384911210,0ptp4l391rcuc/322:30:203
1384911210,0ptp4l391rcuc/322:30:203
9386997011,15cyclictest194612cat22:45:121
257572690,2sleep30-21swapper/322:55:243
194602680,2sleep20-21swapper/222:45:122
938699648,16cyclictest18273-21systemctl22:40:241
138491620,1ptp4l401ktimersoftd/322:49:073
938699618,10cyclictest11771-21latency_hist00:40:011
138491590,1ptp4l401ktimersoftd/322:50:233
938699588,16cyclictest21623-21egrep21:45:111
938699579,17cyclictest30379-21cat20:55:201
247992570,2sleep30-21swapper/319:40:163
225952550,2sleep20-21swapper/221:45:192
938699549,10cyclictest24729-21cat21:50:181
938699548,16cyclictest1792-21apt-key00:20:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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