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2026-06-16 - 06:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Tue Jun 16, 2026 00:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32282202169,22sleep10-21swapper/119:06:171
138591202169,22phc2sys0-21swapper/319:05:423
12232201168,22sleep20-21swapper/219:05:052
32272200166,22sleep00-21swapper/019:06:160
16572590,4sleep0381799cyclictest21:15:010
10672550,5sleep0381799cyclictest23:20:250
56442530,2sleep25647-21processes22:25:232
305932530,2sleep00-21swapper/000:20:220
133342530,2sleep30-21swapper/323:45:233
214422520,1sleep30-21swapper/319:45:023
138491510,1ptp4l401ktimersoftd/320:29:163
138491510,1ptp4l401ktimersoftd/300:01:133
382099501,47cyclictest30622-21kworker/3:019:20:133
265252500,2sleep30-21swapper/323:10:003
3820994814,9cyclictest41-21ksoftirqd/320:10:293
138491480,1ptp4l401ktimersoftd/320:53:233
381899471,44cyclictest0-21swapper/119:11:131
381899450,1cyclictest0-21swapper/120:41:341
50798440,7rtkit-daemon0-21swapper/023:01:350
3820994413,4cyclictest41-21ksoftirqd/300:06:263
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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