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2026-08-05 - 03:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Tue Aug 04, 2026 12:45:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
189732230166,22sleep10-21swapper/107:09:341
138591206171,23phc2sys0-21swapper/307:05:353
187222203169,22sleep00-21swapper/007:06:220
188322200168,21sleep20-21swapper/207:07:492
190082164124,14sleep00-21swapper/007:10:000
187182730,4sleep2311rcuc/212:35:112
135191620,10getstats0-21swapper/309:10:183
1930199575,16cyclictest21840-21awk07:15:142
6852550,4sleep2690-21unixbench_singl11:55:292
137742540,6sleep11930099cyclictest12:25:001
246922520,2sleep00-21swapper/009:30:160
138491520,1ptp4l391rcuc/308:33:573
138491520,1ptp4l391rcuc/307:46:573
1930299481,22cyclictest18975-21date11:30:013
1930199485,16cyclictest19172-21/usr/sbin/munin09:20:152
1930199484,8cyclictest16349-21sshd09:13:412
1930199472,17cyclictest0-21swapper/210:29:102
1930199465,13cyclictest12732-21memory11:15:212
138491440,1ptp4l401ktimersoftd/310:30:103
138491430,0ptp4l401ktimersoftd/310:05:113
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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