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2026-03-25 - 06:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Wed Mar 25, 2026 00:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
247342204171,22sleep10-21swapper/119:07:381
247312204169,23sleep30-21swapper/319:07:363
246482203170,22sleep20-21swapper/219:06:302
248222199165,22sleep00-21swapper/019:08:450
2739821620,3sleep22521299cyclictest23:35:002
2573221540,7sleep32521399cyclictest21:20:183
2491828363,11sleep30-21swapper/319:10:013
25212996246,13cyclictest22304-21sendmail22:20:002
138491570,1ptp4l401ktimersoftd/320:51:273
173542560,4sleep017357-21sendmail20:00:000
25213995318,3cyclictest41-21ksoftirqd/323:30:123
50798480,11rtkit-daemon506-21rtkit-daemon19:36:432
2521299480,2cyclictest0-21swapper/200:10:232
135191480,6getstats2521399cyclictest23:18:113
25213994728,17cyclictest41-21ksoftirqd/300:20:013
25212994516,27cyclictest0-21swapper/222:45:232
138491440,0ptp4l401ktimersoftd/320:20:223
138491440,0ptp4l401ktimersoftd/319:35:123
2521399421,38cyclictest25419-21grep20:15:133
25212994213,27cyclictest0-21swapper/223:35:232
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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