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2026-08-10 - 08:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Mon Aug 10, 2026 00:45:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
138591208163,23phc2sys0-21swapper/319:09:223
299622201168,22sleep10-21swapper/119:07:351
299062201169,22sleep20-21swapper/219:06:512
298082201167,22sleep00-21swapper/019:05:370
1866621400,5sleep33044299cyclictest20:55:163
138491660,1ptp4l401ktimersoftd/319:50:033
47622650,9sleep13044099cyclictest21:30:241
3044199641,21cyclictest4998-21switchtime20:25:252
3044199601,28cyclictest0-21swapper/219:25:192
3044199600,24cyclictest13433-21awk19:40:162
138491580,1ptp4l401ktimersoftd/320:15:163
3044199570,23cyclictest28506-21gdbus23:25:012
3044199570,21cyclictest8759-21irqrtprio19:30:192
3044199570,21cyclictest8759-21irqrtprio19:30:192
3044199561,19cyclictest0-21swapper/222:50:242
3044199551,27cyclictest21259-21/usr/sbin/munin00:15:272
30442994843,3cyclictest26503-21fschecks_count21:10:193
3044199481,18cyclictest0-21swapper/220:15:262
30439994731,3cyclictest9-21ksoftirqd/021:10:140
3014824633,7sleep20-21swapper/219:10:012
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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