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2026-08-27 - 13:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Thu Aug 27, 2026 00:46:04)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
138591205170,24phc2sys0-21swapper/319:05:083
77192198165,22sleep20-21swapper/219:05:562
77792197164,22sleep00-21swapper/019:06:430
77332196162,22sleep10-21swapper/119:06:071
1187121760,7sleep0832399cyclictest21:25:180
547121630,6sleep1832499cyclictest22:15:301
803228362,11sleep10-21swapper/119:10:021
8325996712,25cyclictest32688-21sed19:55:272
232182590,3sleep00-21swapper/022:55:010
50798500,2rtkit-daemon0-21swapper/022:59:250
50798460,2rtkit-daemon0-21swapper/022:06:250
138491460,1ptp4l401ktimersoftd/319:46:093
832399453,10cyclictest9-21ksoftirqd/023:55:000
832599441,23cyclictest976-21/usr/sbin/munin00:20:212
50798440,1rtkit-daemon0-21swapper/020:34:250
135191430,1getstats0-21swapper/300:10:473
135191430,1getstats0-21swapper/300:10:473
8326994210,8cyclictest41-21ksoftirqd/319:35:003
138491420,0ptp4l401ktimersoftd/321:03:523
8324994135,3cyclictest25-21ksoftirqd/122:40:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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