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2026-07-03 - 08:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Fri Jul 03, 2026 00:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
138591206171,23phc2sys0-21swapper/319:05:593
136302204171,21sleep20-21swapper/219:09:282
136292204171,22sleep10-21swapper/119:09:271
135932203169,22sleep00-21swapper/019:08:580
2430721210,2sleep10-21swapper/119:30:121
138491660,1ptp4l9377-21cstates22:15:143
219402590,2sleep10-21swapper/123:45:191
1396799590,19cyclictest23877-21latency_hist19:30:003
154772550,1sleep20-21swapper/221:20:252
1396699540,16cyclictest6679-21acpi21:05:112
1396499535,9cyclictest9-21ksoftirqd/023:25:140
264252510,2sleep30-21swapper/319:35:003
1396599511,10cyclictest10714-21ls21:10:251
1396499513,6cyclictest9-21ksoftirqd/020:55:000
1396499513,6cyclictest9-21ksoftirqd/020:20:130
1396799500,11cyclictest21568-21/usr/sbin/munin20:30:133
1396499509,6cyclictest9-21ksoftirqd/021:35:220
1396499505,8cyclictest9-21ksoftirqd/022:10:110
1396499505,8cyclictest9-21ksoftirqd/019:25:240
1396499493,6cyclictest9-21ksoftirqd/022:35:160
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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