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2026-04-03 - 00:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Thu Apr 02, 2026 12:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
219442205172,22sleep10-21swapper/107:09:331
217392203169,22sleep20-21swapper/207:06:542
216502202168,22sleep00-21swapper/007:05:430
138591201167,23phc2sys0-21swapper/307:09:123
1720721840,6sleep22227799cyclictest09:30:132
327221680,3sleep02227599cyclictest07:55:000
138591161122,14phc2sys0-21swapper/307:10:013
3272221500,7sleep32227899cyclictest07:45:093
2197221430,4sleep22227799cyclictest08:35:142
138491790,1ptp4l6468-21apt12:25:003
14112730,1sleep20-21swapper/207:45:152
2227699700,28cyclictest29606-21/usr/sbin/munin07:35:181
313502680,2sleep20-21swapper/207:35:212
138491560,1ptp4l401ktimersoftd/309:21:243
138491550,1ptp4l401ktimersoftd/309:55:253
47562520,2sleep10-21swapper/110:10:171
138491520,1ptp4l391rcuc/308:15:163
2227699489,28cyclictest3901-21seq09:01:271
135191470,1getstats16225-1kworker/3:1H08:20:123
2227699466,22cyclictest22501-21taskset07:12:331
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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