You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-27 - 22:26
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Mon Apr 27, 2026 12:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
163582205170,23sleep10-21swapper/107:07:541
142542203169,23sleep30-21swapper/307:05:073
163272201168,21sleep20-21swapper/207:07:322
162332199166,22sleep00-21swapper/007:06:180
686221690,6sleep31682099cyclictest07:55:153
1385919066,13phc2sys0-21swapper/307:10:003
138491720,1ptp4l391rcuc/310:55:413
138491700,1ptp4l401ktimersoftd/308:17:393
138491660,1ptp4l401ktimersoftd/311:42:043
138491610,1ptp4l401ktimersoftd/311:15:253
138491550,1ptp4l401ktimersoftd/309:58:193
66552540,6sleep11681899cyclictest07:55:131
196692510,3sleep219650-21fschecks_count09:25:162
16472450,1sleep01649-21latency_hist07:45:010
138491440,0ptp4l401ktimersoftd/308:30:053
138491430,0ptp4l401ktimersoftd/309:10:053
138491430,0ptp4l401ktimersoftd/308:37:113
138491420,0ptp4l401ktimersoftd/312:05:373
138491420,0ptp4l401ktimersoftd/311:23:373
138491400,0ptp4l401ktimersoftd/308:00:283
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional