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2026-07-11 - 08:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Sat Jul 11, 2026 00:45:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
225202206171,23sleep30-21swapper/319:05:303
227662205171,22sleep20-21swapper/219:08:422
228152203169,23sleep10-21swapper/119:09:211
226402203169,22sleep00-21swapper/019:07:030
1385918162,11phc2sys0-21swapper/319:10:003
294962620,5sleep12315999cyclictest19:20:241
97172610,2sleep30-21swapper/321:55:223
86152530,2sleep18619-21irqrtprio00:05:181
60752500,2sleep00-21swapper/000:00:170
257572460,2sleep30-21swapper/319:15:123
23161994532,11cyclictest41-21ksoftirqd/322:44:593
138491430,0ptp4l401ktimersoftd/323:04:163
138491420,0ptp4l401ktimersoftd/321:08:503
134991410,2getstats0-21swapper/320:25:243
23158994035,3cyclictest9-21ksoftirqd/022:40:000
23158994034,3cyclictest9-21ksoftirqd/019:35:000
23158994034,3cyclictest9-21ksoftirqd/019:35:000
23161993934,3cyclictest7983-21cron21:54:593
23158993933,3cyclictest9-21ksoftirqd/020:45:000
23160993832,4cyclictest33-21ksoftirqd/221:04:312
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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