You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-21 - 14:57
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Sat Feb 21, 2026 00:45:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
138591206170,24phc2sys0-21swapper/319:08:333
217812203169,22sleep00-21swapper/019:08:090
218492201168,22sleep10-21swapper/119:09:031
216142200167,22sleep20-21swapper/219:05:572
2192528561,16sleep30-21swapper/319:10:013
138491550,1ptp4l401ktimersoftd/323:57:283
138491540,1ptp4l391rcuc/322:35:213
133232510,5sleep013326-21df_abs00:15:130
138491500,4ptp4l401ktimersoftd/323:41:123
288062480,1sleep20-21swapper/220:25:242
2221999460,27cyclictest25849-21sed21:25:161
138491460,1ptp4l401ktimersoftd/322:50:053
138491440,0ptp4l401ktimersoftd/323:29:563
138491430,0ptp4l401ktimersoftd/321:10:533
138491420,0ptp4l401ktimersoftd/319:28:103
138491420,0ptp4l401ktimersoftd/300:26:243
22219994136,3cyclictest10895-21fschecks_count00:10:151
138491410,1ptp4l401ktimersoftd/319:42:533
22220994033,4cyclictest33-21ksoftirqd/222:49:222
22220993832,4cyclictest33-21ksoftirqd/223:09:042
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional