You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-17 - 04:58
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Fri Jul 17, 2026 00:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
49822224159,21sleep20-21swapper/219:07:242
49472206172,23sleep30-21swapper/319:07:013
48602204171,22sleep10-21swapper/119:05:551
49492202169,22sleep00-21swapper/019:07:020
1759221440,7sleep2547799cyclictest19:35:002
235772660,3sleep023580-21irqrtprio21:55:180
547799614,16cyclictest14069-21cat23:45:192
547799604,11cyclictest10293-21latency_hist21:30:012
547799582,16cyclictest0-21swapper/223:40:122
296372580,2sleep20-21swapper/219:55:262
93282570,2sleep10-21swapper/120:20:241
547799577,11cyclictest26004-21cat23:05:132
547799562,10cyclictest0-21swapper/221:40:122
138491560,1ptp4l401ktimersoftd/321:37:573
547799554,9cyclictest0-21swapper/219:45:192
547799553,19cyclictest0-21swapper/220:55:142
547799553,19cyclictest0-21swapper/220:55:142
547799552,19cyclictest0-21swapper/222:56:212
547799552,19cyclictest0-21swapper/222:56:212
547799552,15cyclictest3083-21/usr/sbin/munin21:15:292
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional