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2026-06-27 - 16:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Sat Jun 27, 2026 12:45:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
215242228199,19sleep00-21swapper/007:05:580
138591206172,23phc2sys0-21swapper/307:06:553
217522203168,23sleep10-21swapper/107:08:571
216862202168,22sleep20-21swapper/207:08:062
2065021510,5sleep12213599cyclictest09:15:211
2213799640,26cyclictest19114-21/usr/sbin/munin11:25:293
22135996326,8cyclictest25-21ksoftirqd/107:50:011
2213799621,21cyclictest8090-21irqstats09:55:193
2213799620,22cyclictest21336-21awk12:30:283
306642610,2sleep030665-21gzip11:45:240
22135996125,9cyclictest25-21ksoftirqd/107:40:001
22135996123,8cyclictest25-21ksoftirqd/112:05:251
22135996121,6cyclictest25-21ksoftirqd/108:40:241
22135996030,8cyclictest25-21ksoftirqd/107:50:141
22135996023,8cyclictest25-21ksoftirqd/111:35:161
22135995926,4cyclictest25-21ksoftirqd/110:01:241
22135995925,10cyclictest25-21ksoftirqd/109:35:231
22135995923,9cyclictest25-21ksoftirqd/108:50:161
22135995923,8cyclictest25-21ksoftirqd/111:55:241
22135995923,8cyclictest25-21ksoftirqd/111:10:151
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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