You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-11-18 - 23:53
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Tue Nov 18, 2025 12:45:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
21332205170,23sleep10-21swapper/107:05:541
24582203169,22sleep00-21swapper/007:09:590
427791202169,22phc2sys0-21swapper/307:05:073
21012201167,23sleep20-21swapper/207:05:312
113162840,2sleep00-21swapper/009:35:200
4277918363,11phc2sys0-21swapper/307:10:003
2752996521,4cyclictest33-21ksoftirqd/212:05:212
252932650,1sleep00-21swapper/012:10:260
252932650,1sleep00-21swapper/012:10:250
2752996128,4cyclictest33-21ksoftirqd/209:30:212
2752996126,4cyclictest33-21ksoftirqd/209:40:172
2752996026,4cyclictest33-21ksoftirqd/208:55:172
2753995929,3cyclictest41-21ksoftirqd/307:50:133
311582580,2sleep30-21swapper/312:25:023
2753995828,3cyclictest41-21ksoftirqd/312:35:193
2753995826,3cyclictest41-21ksoftirqd/307:35:003
2752995827,4cyclictest33-21ksoftirqd/211:20:172
2752995826,4cyclictest33-21ksoftirqd/207:15:012
2753995727,4cyclictest41-21ksoftirqd/308:25:173
2753995727,4cyclictest41-21ksoftirqd/308:10:153
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional