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2026-07-10 - 19:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Fri Jul 10, 2026 12:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
90912207174,21sleep00-21swapper/007:08:200
89802205170,23sleep10-21swapper/107:07:001
88742204172,21sleep20-21swapper/207:05:372
138591204171,22phc2sys0-21swapper/307:07:193
9516996629,4cyclictest41-21ksoftirqd/309:15:003
9516996230,4cyclictest41-21ksoftirqd/309:20:003
9516996121,4cyclictest41-21ksoftirqd/307:15:143
9513996123,4cyclictest9-21ksoftirqd/008:25:250
9516996029,4cyclictest41-21ksoftirqd/310:10:003
9515996016,9cyclictest33-21ksoftirqd/210:15:132
9516995932,4cyclictest41-21ksoftirqd/312:05:273
9516995932,4cyclictest41-21ksoftirqd/311:15:263
9516995928,4cyclictest41-21ksoftirqd/311:55:153
9516995928,4cyclictest41-21ksoftirqd/308:25:153
9515995919,4cyclictest33-21ksoftirqd/212:37:372
951499591,24cyclictest223-21systemd-journal11:55:001
9516995830,4cyclictest41-21ksoftirqd/310:50:193
9516995828,3cyclictest41-21ksoftirqd/307:35:253
9516995826,4cyclictest41-21ksoftirqd/308:05:263
9515995821,6cyclictest33-21ksoftirqd/212:00:012
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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