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2026-09-07 - 04:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Mon Sep 07, 2026 00:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
138591206143,22phc2sys0-21swapper/319:09:273
248302202169,22sleep00-21swapper/019:08:170
246362201167,23sleep10-21swapper/119:05:531
248002200167,22sleep20-21swapper/219:07:552
2516421660,5sleep32527399cyclictest21:15:243
324962930,2sleep00-21swapper/023:40:200
2527099641,23cyclictest5374-21cat19:35:011
2527099634,20cyclictest24142-21cstates00:30:131
2527099630,21cyclictest3787-21latency_hist23:50:001
2527099629,24cyclictest15899-21sed22:05:001
2527099620,22cyclictest23820-21cat00:30:011
2527099620,22cyclictest15954-21latency_hist23:10:011
2527099620,21cyclictest8646-21grep22:55:121
2527099610,21cyclictest15527-21latency_hist19:55:011
2527099600,24cyclictest6312-21/usr/sbin/munin19:35:171
2527099600,22cyclictest1401-21expr22:40:141
25269996033,8cyclictest9-21ksoftirqd/019:35:010
25269996024,7cyclictest9-21ksoftirqd/022:10:180
2527099599,18cyclictest5956-21ls20:40:011
25269995932,4cyclictest9-21ksoftirqd/020:25:220
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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