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2026-08-29 - 01:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Fri Aug 28, 2026 12:45:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
138591236168,23phc2sys0-21swapper/307:07:323
296872213182,21sleep10-21swapper/107:07:081
297132206171,23sleep00-21swapper/007:07:270
296832204171,22sleep20-21swapper/207:07:052
138491730,1ptp4l391rcuc/312:10:263
308382630,2sleep00-21swapper/009:20:170
308382630,2sleep00-21swapper/009:20:170
138491570,1ptp4l401ktimersoftd/312:17:383
138491570,1ptp4l401ktimersoftd/307:45:253
138491570,1ptp4l401ktimersoftd/307:45:253
180682540,6sleep23021099cyclictest10:00:162
3020999537,14cyclictest16715-21ls08:50:251
3020999536,14cyclictest12494-21/usr/sbin/munin10:55:191
89212510,2sleep30-21swapper/310:45:253
3020999517,13cyclictest31422-21ssh10:25:261
3020999508,14cyclictest20538-21iostat_ios12:15:201
205262500,2sleep00-21swapper/007:55:130
3020999496,7cyclictest21473-21ls07:55:211
135191490,7getstats3021199cyclictest08:36:083
3020999467,8cyclictest10692-21iostat_ios11:55:191
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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