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2026-04-23 - 19:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Thu Apr 23, 2026 12:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
234902202167,23sleep30-21swapper/307:08:143
233382201168,22sleep10-21swapper/107:06:151
233372200166,22sleep00-21swapper/007:06:130
234062199167,21sleep20-21swapper/207:07:082
178552750,32sleep125-21ksoftirqd/112:20:181
18032570,1sleep10-21swapper/108:35:121
44902560,7sleep02392099cyclictest11:55:130
2392299521,48cyclictest0-21swapper/207:30:242
2392299521,48cyclictest0-21swapper/207:30:242
159422520,3sleep22392299cyclictest11:10:252
2392299500,48cyclictest0-21swapper/212:00:442
135191460,2getstats0-21swapper/309:45:173
296342450,2sleep20-21swapper/209:30:172
296342450,2sleep20-21swapper/209:30:172
50798440,9rtkit-daemon0-21swapper/108:03:221
50798440,9rtkit-daemon0-21swapper/108:03:211
23920994327,13cyclictest9-21ksoftirqd/008:25:100
138491420,0ptp4l401ktimersoftd/308:28:183
23923994124,14cyclictest41-21ksoftirqd/312:10:013
138491410,16ptp4l401ktimersoftd/310:35:263
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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