You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-22 - 04:59
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot4.osadl.org (updated Sat Aug 22, 2026 00:45:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
224682210166,32sleep20-21swapper/219:06:552
224682210166,32sleep20-21swapper/219:06:542
224042205170,23sleep30-21swapper/319:06:033
224042205170,23sleep30-21swapper/319:06:033
224322202169,22sleep10-21swapper/119:06:251
224322202169,22sleep10-21swapper/119:06:241
224312202168,22sleep00-21swapper/019:06:240
224312202168,22sleep00-21swapper/019:06:230
1961021540,2sleep32300699cyclictest20:05:273
2271128464,11sleep30-21swapper/319:10:013
138491730,2ptp4l391rcuc/322:25:203
138491730,2ptp4l391rcuc/322:25:203
23005997035,5cyclictest33-21ksoftirqd/220:00:012
23005996528,10cyclictest33-21ksoftirqd/219:25:112
23005996431,5cyclictest33-21ksoftirqd/222:05:002
23005996429,7cyclictest33-21ksoftirqd/220:25:232
23005996424,11cyclictest33-21ksoftirqd/222:55:212
2300399640,3cyclictest30632-21hddtemp_smartct21:35:160
23005996330,7cyclictest33-21ksoftirqd/220:55:222
23005996330,4cyclictest33-21ksoftirqd/221:35:122
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional