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2025-11-23 - 08:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot4.osadl.org (updated Sun Nov 23, 2025 00:45:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
427791205171,23phc2sys0-21swapper/319:08:303
236052202167,23sleep10-21swapper/119:06:391
237332200166,22sleep20-21swapper/219:08:082
235592200166,23sleep00-21swapper/019:06:010
135092640,4sleep20-21swapper/223:05:252
427291630,1ptp4l401ktimersoftd/323:26:553
321632580,3sleep10-21swapper/121:35:181
427291560,1ptp4l401ktimersoftd/323:35:163
24170995548,4cyclictest18917-21dump-pmu-power20:05:011
427291540,1ptp4l391rcuc/300:00:413
24171994439,3cyclictest24562-21idleruntime-cro00:35:002
24171994439,3cyclictest11977-21ls00:10:002
24171994438,3cyclictest16595-21cron23:15:002
24170994430,11cyclictest25-21ksoftirqd/119:14:591
24169994437,4cyclictest359-21rs:main0
427291430,0ptp4l401ktimersoftd/323:20:223
427291420,0ptp4l401ktimersoftd/322:22:273
427291420,0ptp4l401ktimersoftd/319:23:063
24172994135,4cyclictest41-21ksoftirqd/300:29:063
24171994136,3cyclictest33-21ksoftirqd/222:45:002
24171994130,9cyclictest33-21ksoftirqd/221:25:172
427291400,0ptp4l401ktimersoftd/321:10:133
24172994034,4cyclictest41-21ksoftirqd/323:46:063
24172994034,4cyclictest41-21ksoftirqd/322:32:003
24172994034,4cyclictest41-21ksoftirqd/322:18:203
24172994034,4cyclictest41-21ksoftirqd/321:42:183
24171994035,3cyclictest33-21ksoftirqd/220:40:002
24171994035,3cyclictest33-21ksoftirqd/220:40:002
24171994024,14cyclictest33-21ksoftirqd/223:04:292
427291390,0ptp4l401ktimersoftd/321:17:543
24172993934,3cyclictest41-21ksoftirqd/322:01:243
24172993933,4cyclictest41-21ksoftirqd/321:51:483
24172993933,4cyclictest41-21ksoftirqd/321:47:073
24172993933,4cyclictest41-21ksoftirqd/321:07:523
24172993933,4cyclictest41-21ksoftirqd/300:38:463
24172993932,4cyclictest41-21ksoftirqd/320:02:573
24171993934,3cyclictest33-21ksoftirqd/220:05:192
24171993932,4cyclictest33-21ksoftirqd/200:25:012
24170993933,4cyclictest25-21ksoftirqd/122:44:421
24169993935,2cyclictest9-21ksoftirqd/000:15:000
24169993935,2cyclictest9-21ksoftirqd/000:15:000
24169993933,4cyclictest9-21ksoftirqd/020:30:010
24172993833,3cyclictest41-21ksoftirqd/321:55:123
24172993832,4cyclictest41-21ksoftirqd/323:57:333
24172993832,4cyclictest41-21ksoftirqd/323:11:563
24172993832,4cyclictest41-21ksoftirqd/321:03:543
24172993832,4cyclictest41-21ksoftirqd/320:57:343
24172993832,4cyclictest41-21ksoftirqd/319:55:553
24172993832,4cyclictest41-21ksoftirqd/319:16:393
24171993832,4cyclictest33-21ksoftirqd/222:31:392
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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