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2025-12-07 - 11:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot4.osadl.org (updated Sun Dec 07, 2025 00:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
427791202167,23phc2sys0-21swapper/319:05:103
283732201166,23sleep10-21swapper/119:07:011
284032200166,23sleep20-21swapper/219:07:212
283922196161,23sleep00-21swapper/019:07:150
427791158122,27phc2sys0-21swapper/319:10:003
2477521450,4sleep32891199cyclictest20:05:163
6152750,2sleep00-21swapper/019:15:260
6152750,2sleep00-21swapper/019:15:250
267272690,5sleep226730-21unixbench_multi22:15:282
427291640,1ptp4l401ktimersoftd/320:30:153
71982590,2sleep10-21swapper/120:35:141
427291590,1ptp4l401ktimersoftd/319:50:293
28910995043,4cyclictest227-21systemd-journal19:35:002
304452480,2sleep10-21swapper/121:20:191
28911994541,2cyclictest41-21ksoftirqd/321:20:003
2891199450,3cyclictest121rcu_preempt22:30:173
28910994541,3cyclictest33-21ksoftirqd/223:20:012
28911994438,3cyclictest41-21ksoftirqd/300:35:003
28911994437,4cyclictest22243-21cron22:10:003
28910994438,4cyclictest33-21ksoftirqd/220:35:002
28910994438,4cyclictest33-21ksoftirqd/200:10:002
427291430,1ptp4l401ktimersoftd/322:10:163
427291430,0ptp4l401ktimersoftd/321:20:553
427291430,0ptp4l401ktimersoftd/320:17:243
28911994338,3cyclictest41-21ksoftirqd/323:55:003
28911994336,4cyclictest41-21ksoftirqd/300:36:593
427291420,0ptp4l401ktimersoftd/321:28:173
28911994237,3cyclictest2601-21cron23:40:003
28911994236,3cyclictest41-21ksoftirqd/321:55:003
28911994232,9cyclictest41-21ksoftirqd/321:10:203
28908994236,3cyclictest9-21ksoftirqd/022:45:000
28908994236,3cyclictest9-21ksoftirqd/022:25:000
28911994136,3cyclictest41-21ksoftirqd/323:30:183
28911994136,3cyclictest41-21ksoftirqd/323:30:003
28911994135,4cyclictest41-21ksoftirqd/300:08:583
28911994130,9cyclictest41-21ksoftirqd/323:05:253
28908994136,3cyclictest9-21ksoftirqd/019:40:000
28911994035,3cyclictest41-21ksoftirqd/322:40:013
28911994035,3cyclictest41-21ksoftirqd/322:30:003
28911994035,3cyclictest41-21ksoftirqd/320:50:303
28911994035,3cyclictest41-21ksoftirqd/320:30:003
28911994035,3cyclictest41-21ksoftirqd/320:00:293
28911994034,4cyclictest41-21ksoftirqd/319:16:203
28911994034,4cyclictest41-21ksoftirqd/319:16:203
28911994034,3cyclictest41-21ksoftirqd/321:37:523
28911994034,3cyclictest41-21ksoftirqd/320:15:003
28910994028,11cyclictest33-21ksoftirqd/219:55:002
28909994033,4cyclictest30015-21ls23:30:001
28909994033,4cyclictest25-21ksoftirqd/120:49:581
28908994035,3cyclictest9-21ksoftirqd/020:00:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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