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2026-09-22 - 10:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot4.osadl.org (updated Tue Sep 22, 2026 00:45:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
168762202169,22sleep10-21swapper/119:06:491
138591202167,23phc2sys0-21swapper/319:06:113
169902200168,21sleep20-21swapper/219:08:142
168872199165,22sleep00-21swapper/019:06:550
1739421690,4sleep00-21swapper/019:10:010
171262160122,13sleep30-21swapper/319:10:003
27452630,8sleep21742099cyclictest19:45:132
70792610,6sleep31742199cyclictest00:15:013
306642570,6sleep21742099cyclictest22:50:202
279942540,2sleep20-21swapper/223:50:202
77312490,6sleep21742099cyclictest21:00:152
325342490,2sleep00-21swapper/019:40:140
325342490,2sleep00-21swapper/019:40:140
138491440,0ptp4l401ktimersoftd/322:45:123
138491440,0ptp4l401ktimersoftd/319:50:573
138491430,0ptp4l401ktimersoftd/321:04:343
138491430,0ptp4l401ktimersoftd/320:48:383
138491430,0ptp4l401ktimersoftd/319:55:193
138491430,0ptp4l401ktimersoftd/319:35:483
17420994237,3cyclictest420-21rs:main2
17420994213,5cyclictest33-21ksoftirqd/221:55:222
50798410,1rtkit-daemon506-21rtkit-daemon00:00:301
17420994128,10cyclictest33-21ksoftirqd/221:15:242
138491410,0ptp4l401ktimersoftd/323:15:283
138491410,0ptp4l401ktimersoftd/319:20:273
138491410,0ptp4l401ktimersoftd/300:25:013
1742099409,4cyclictest33-21ksoftirqd/222:30:222
17420994029,9cyclictest33-21ksoftirqd/220:05:262
17420994017,10cyclictest33-21ksoftirqd/219:10:142
1741999400,1cyclictest0-21swapper/123:15:131
17421993910,28cyclictest28772-21kworker/3:223:13:433
1741999390,37cyclictest0-21swapper/120:50:241
1742099389,3cyclictest33-21ksoftirqd/220:55:202
1742099387,4cyclictest33-21ksoftirqd/200:00:012
1742099385,6cyclictest33-21ksoftirqd/220:15:232
17420993835,2cyclictest33-21ksoftirqd/222:30:002
17420993835,2cyclictest33-21ksoftirqd/200:40:002
17420993833,3cyclictest33-21ksoftirqd/222:10:262
17420993832,4cyclictest33-21ksoftirqd/220:36:322
17420993831,4cyclictest33-21ksoftirqd/221:32:442
17420993811,3cyclictest33-21ksoftirqd/222:40:272
17418993831,4cyclictest9-21ksoftirqd/019:45:110
1742199373,16cyclictest4643-21cat00:10:013
1742099373,3cyclictest33-21ksoftirqd/222:15:242
17420993732,3cyclictest33-21ksoftirqd/223:20:002
17420993732,3cyclictest33-21ksoftirqd/220:50:002
17420993732,3cyclictest33-21ksoftirqd/220:10:032
17420993732,3cyclictest33-21ksoftirqd/219:45:012
17420993732,3cyclictest33-21ksoftirqd/219:45:012
17420993731,3cyclictest33-21ksoftirqd/221:05:122
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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