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2026-04-08 - 05:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot4.osadl.org (updated Wed Apr 08, 2026 00:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
229352203170,22sleep10-21swapper/119:08:341
227732202168,22sleep30-21swapper/319:06:273
229042201167,22sleep00-21swapper/019:08:100
228862199167,22sleep20-21swapper/219:07:562
665421730,7sleep22348999cyclictest00:00:152
1505621480,6sleep32349099cyclictest00:15:213
162232820,5sleep216225-21latency_hist21:05:002
287042650,2sleep00-21swapper/022:35:130
23490996225,8cyclictest41-21ksoftirqd/320:10:163
23490996225,16cyclictest41-21ksoftirqd/300:00:203
23490995821,4cyclictest41-21ksoftirqd/319:35:133
2349099575,9cyclictest41-21ksoftirqd/321:30:003
23490995724,3cyclictest41-21ksoftirqd/319:25:233
23490995723,5cyclictest41-21ksoftirqd/322:10:003
23490995721,4cyclictest41-21ksoftirqd/319:18:503
23490995653,2cyclictest391rcuc/321:30:223
23490995625,4cyclictest41-21ksoftirqd/323:35:193
23490995624,7cyclictest41-21ksoftirqd/321:51:433
23490995623,4cyclictest41-21ksoftirqd/322:25:203
23490995522,8cyclictest41-21ksoftirqd/322:46:073
23490995422,9cyclictest41-21ksoftirqd/322:14:123
23490995422,3cyclictest41-21ksoftirqd/323:20:143
23490995421,10cyclictest41-21ksoftirqd/322:15:243
23490995325,8cyclictest41-21ksoftirqd/300:35:133
23490995323,9cyclictest41-21ksoftirqd/321:40:183
23490995320,4cyclictest41-21ksoftirqd/323:40:143
23490995320,4cyclictest41-21ksoftirqd/300:14:273
23490995221,4cyclictest41-21ksoftirqd/320:35:123
23490995221,10cyclictest41-21ksoftirqd/320:19:083
23490995217,4cyclictest41-21ksoftirqd/322:40:183
276312510,4sleep20-21swapper/219:15:242
2349099515,10cyclictest41-21ksoftirqd/319:10:193
2349099514,3cyclictest41-21ksoftirqd/320:20:143
2349099512,6cyclictest41-21ksoftirqd/322:34:593
2349099505,8cyclictest41-21ksoftirqd/323:05:253
2349099502,8cyclictest41-21ksoftirqd/321:55:153
23490995021,8cyclictest41-21ksoftirqd/321:10:103
23490995021,13cyclictest41-21ksoftirqd/323:45:133
23490995019,3cyclictest41-21ksoftirqd/319:21:103
23490995018,4cyclictest41-21ksoftirqd/321:45:133
23490995015,4cyclictest41-21ksoftirqd/319:45:123
2349099496,8cyclictest41-21ksoftirqd/300:05:263
2349099495,7cyclictest41-21ksoftirqd/319:30:233
23490994921,9cyclictest41-21ksoftirqd/300:25:233
23490994921,7cyclictest41-21ksoftirqd/321:40:003
23490994920,9cyclictest41-21ksoftirqd/319:55:083
2349099491,6cyclictest41-21ksoftirqd/321:20:183
2349099483,8cyclictest41-21ksoftirqd/322:35:143
2349099483,8cyclictest41-21ksoftirqd/322:20:253
2349099482,6cyclictest41-21ksoftirqd/323:50:273
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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