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2026-07-07 - 10:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot4.osadl.org (updated Tue Jul 07, 2026 00:45:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
313502232185,38sleep10-21swapper/119:05:581
138591216170,34phc2sys0-21swapper/319:09:463
315172203171,21sleep00-21swapper/019:08:030
313462202169,22sleep20-21swapper/219:05:562
2902921540,5sleep33196399cyclictest23:25:283
3155821360,6sleep03196099cyclictest22:25:270
138491720,12ptp4l11310-21apache222:10:233
204722600,1sleep30-21swapper/322:05:133
138491600,1ptp4l401ktimersoftd/320:45:253
31961995823,10cyclictest25-21ksoftirqd/122:20:001
31961995626,6cyclictest25-21ksoftirqd/121:40:161
31961995623,7cyclictest25-21ksoftirqd/122:30:161
322992550,7sleep13196199cyclictest23:35:001
31961995425,7cyclictest25-21ksoftirqd/119:20:281
31961995419,5cyclictest25-21ksoftirqd/100:30:251
31961995417,8cyclictest25-21ksoftirqd/120:15:001
31961995323,8cyclictest25-21ksoftirqd/120:30:231
138491530,1ptp4l401ktimersoftd/322:42:303
31961995221,3cyclictest25-21ksoftirqd/121:49:591
31961995121,7cyclictest25-21ksoftirqd/122:50:221
257652510,1sleep00-21swapper/023:20:190
138491510,1ptp4l401ktimersoftd/322:03:193
31961995021,3cyclictest25-21ksoftirqd/121:00:001
31961995018,4cyclictest25-21ksoftirqd/119:50:001
31961995016,7cyclictest25-21ksoftirqd/121:30:281
31961995016,4cyclictest25-21ksoftirqd/119:45:011
31961995013,4cyclictest25-21ksoftirqd/121:20:171
31961994916,4cyclictest25-21ksoftirqd/119:50:271
31961994915,7cyclictest25-21ksoftirqd/119:15:211
31961994914,3cyclictest25-21ksoftirqd/119:25:161
31961994913,3cyclictest25-21ksoftirqd/123:40:151
31961994821,7cyclictest25-21ksoftirqd/122:45:001
31961994820,3cyclictest25-21ksoftirqd/121:55:001
31961994818,4cyclictest25-21ksoftirqd/100:20:171
31961994816,8cyclictest25-21ksoftirqd/122:00:131
31961994816,7cyclictest25-21ksoftirqd/122:55:301
31961994814,8cyclictest25-21ksoftirqd/120:45:211
31961994814,4cyclictest25-21ksoftirqd/122:49:591
31961994717,9cyclictest25-21ksoftirqd/120:40:011
31961994717,4cyclictest25-21ksoftirqd/123:10:251
31961994716,4cyclictest25-21ksoftirqd/122:20:181
31961994715,8cyclictest25-21ksoftirqd/122:05:251
31961994715,7cyclictest25-21ksoftirqd/121:55:201
31961994715,4cyclictest25-21ksoftirqd/120:24:591
31961994714,8cyclictest25-21ksoftirqd/123:35:211
31961994714,4cyclictest25-21ksoftirqd/123:15:141
31961994712,6cyclictest25-21ksoftirqd/123:55:241
31961994618,3cyclictest25-21ksoftirqd/100:25:181
31961994614,4cyclictest25-21ksoftirqd/120:00:151
3196199458,10cyclictest25-21ksoftirqd/123:45:241
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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