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2026-05-20 - 14:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Wed May 20, 2026 00:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15618769911396,13cyclictest1579546-21latency_hist20:05:011
15618749910697,7cyclictest1636513-21latency_hist23:00:000
15618769910290,9cyclictest1571574-21/usr/sbin/munin19:40:231
15618749910193,5cyclictest1213033-21systemd-journal21:19:590
1561876999785,9cyclictest1561797-21kworker/u8:2+flush-179:019:25:001
1561876999774,20cyclictest1581626-21/usr/sbin/munin20:10:251
1561876999683,9cyclictest1213033-21systemd-journal00:03:591
1561874999487,5cyclictest1609185-21kworker/u8:2+flush-179:022:00:000
1561874999483,8cyclictest1610802-21latency_hist21:40:010
1561876999384,6cyclictest1634922-21latency_hist22:55:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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