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2026-04-18 - 00:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Fri Apr 17, 2026 12:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
378607699110102,6cyclictest3860076-21latency_hist11:00:010
378607699110102,6cyclictest3860076-21latency_hist11:00:010
3786080999889,7cyclictest3807005-21latency_hist08:15:011
3786076999383,7cyclictest3844156-21latency_hist10:10:010
3786080998873,13cyclictest3845777-21kworker/u8:3+flush-179:010:19:591
3786076998678,6cyclictest3797206-21latency_hist07:45:000
3786076998372,8cyclictest1213033-21systemd-journal10:30:000
3786080998274,6cyclictest3836199-21latency_hist09:45:011
3786080998274,6cyclictest3836199-21latency_hist09:45:001
3786080998072,6cyclictest1213033-21systemd-journal07:30:221
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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