You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-11 - 04:00
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Sun Jan 11, 2026 00:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3560272999787,8cyclictest3608490-21latency_hist21:40:011
3560271998982,5cyclictest3571681-21kworker/u8:0+flush-179:019:50:000
3560271998981,6cyclictest3637625-21kworker/u8:1+events_unbound23:15:010
3560271998882,4cyclictest3609170-21kworker/u8:3+flush-179:021:49:550
3560271998472,9cyclictest3566599-21latency_hist19:30:000
3560271998376,4cyclictest3571681-21kworker/u8:0+flush-179:019:54:590
3560271998373,8cyclictest3559385-21kworker/u8:0+flush-179:019:25:000
3560271998373,8cyclictest3559385-21kworker/u8:0+flush-179:019:25:000
3560271998276,4cyclictest3650360-21kworker/u8:0+flush-179:000:00:190
3560271998276,4cyclictest3631323-21kworker/u8:3+events_unbound22:50:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional