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2026-08-13 - 21:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Thu Aug 13, 2026 12:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
329685099126110,13cyclictest1213033-21systemd-journal12:05:011
329684899126115,8cyclictest1213033-21systemd-journal09:55:000
329685099123112,8cyclictest3361726-21latency_hist10:30:011
329685099121111,7cyclictest3390927-21latency_hist12:00:001
329685099119113,4cyclictest3392482-21kworker/u8:1+events_unbound12:20:141
329684899118108,8cyclictest3326181-21latency_hist08:40:000
32968509911794,21cyclictest3392482-21kworker/u8:1+flush-179:012:15:001
32968509911794,21cyclictest3392482-21kworker/u8:1+flush-179:012:14:591
329685099117108,7cyclictest3301754-21latency_hist07:25:001
329685099113102,8cyclictest3396175-21/usr/sbin/munin12:15:251
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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