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2025-12-23 - 00:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Mon Dec 22, 2025 12:44:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31051949910191,7cyclictest3210391-21latency_hist12:40:001
3105192999586,6cyclictest3109848-21latency_hist07:25:010
3105194999382,8cyclictest3204022-21latency_hist12:20:021
3105194999382,8cyclictest3204022-21latency_hist12:20:021
3105194998777,7cyclictest3152058-21latency_hist09:35:001
3105194998674,9cyclictest3182550-21latency_hist11:10:001
3105194998580,4cyclictest3119956-21kworker/u8:1+events_unbound09:00:251
3105194998571,4cyclictest3189165-21kworker/u8:2+events_unbound11:30:201
3105192998475,7cyclictest3177772-21latency_hist10:55:010
3105194998176,3cyclictest3108219-21kworker/u8:2+flush-179:007:20:211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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