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2026-05-07 - 07:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Thu May 07, 2026 00:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
33453599911298,13cyclictest3429690-21kworker/u8:0+flush-179:000:00:011
3345359999683,9cyclictest1213033-21systemd-journal21:35:011
3345359998981,6cyclictest3432891-21latency_hist23:40:001
3345357998875,9cyclictest3361519-21http19:59:590
3345357998779,5cyclictest1-21systemd23:10:000
3345359998677,6cyclictest3418296-21latency_hist22:55:011
3345359998478,5cyclictest3445650-21kworker/u8:3+flush-179:000:30:001
3345357998478,4cyclictest3403971-21latency_hist22:10:010
3345357998274,5cyclictest3447291-21latency_hist00:25:000
3345359998075,4cyclictest3347764-21kworker/u8:0+events_unbound19:20:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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