You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-22 - 01:17
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Tue Apr 21, 2026 12:44:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
235499299112103,7cyclictest2382541-21latency_hist08:35:011
23549929910899,6cyclictest2413038-21latency_hist10:10:011
23549929910394,7cyclictest2457904-21latency_hist12:30:011
23549909910090,7cyclictest2393681-21latency_hist09:10:010
2354990998878,7cyclictest2366646-21latency_hist07:45:010
2354992998476,6cyclictest2388902-21latency_hist08:55:011
2354990998475,7cyclictest2395267-21latency_hist09:15:010
2354990998475,7cyclictest1213033-21systemd-journal08:40:010
2354990998273,7cyclictest2377771-21latency_hist08:20:010
2354992998174,5cyclictest2445175-21latency_hist11:50:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional