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2026-05-04 - 19:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Mon May 04, 2026 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6320499910194,5cyclictest675267-21kworker/u8:0+events_unbound09:55:001
632049999992,5cyclictest687686-21kworker/u8:0+flush-179:010:00:221
632049998981,6cyclictest732119-21latency_hist12:20:001
632049998778,7cyclictest660950-21latency_hist08:40:011
632049998778,6cyclictest654586-21latency_hist08:20:011
632049998274,5cyclictest3666621-21kworker/u8:3+flush-179:007:45:221
632049998172,6cyclictest727210-21kworker/u8:2+events_unbound12:05:241
632049998070,7cyclictest650912-21journal-offline08:05:231
632049997662,11cyclictest680054-21latency_hist09:40:001
632048997669,5cyclictest676910-21kworker/u8:1+flush-179:009:55:230
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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