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2026-05-28 - 13:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Thu May 28, 2026 00:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
261645999134108,22cyclictest2651627-21latency_hist21:00:021
261645999134108,22cyclictest2651627-21latency_hist21:00:011
261645799124113,8cyclictest2710256-40mandb00:00:000
26164579910897,8cyclictest2634125-21latency_hist20:05:020
26164599910696,7cyclictest2715298-21kworker/u8:2+flush-179:000:15:251
26164579910292,8cyclictest2654804-21latency_hist21:10:020
26164579910089,8cyclictest2689007-21latency_hist22:55:010
2616457999992,5cyclictest2672812-21kworker/u8:0+flush-179:022:15:020
2616459999583,9cyclictest1213033-21systemd-journal23:25:011
2616459999487,4cyclictest2621369-21kworker/u8:0+flush-179:019:25:221
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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