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2025-12-28 - 11:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Sun Dec 28, 2025 00:44:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1905754999889,7cyclictest1958465-21kworker/u8:0+events_unbound22:00:020
1905754999280,10cyclictest266-21systemd-journal22:55:000
1905754999184,6cyclictest1938778-21kworker/u8:0+flush-179:021:00:000
1905754998883,4cyclictest1908779-21kworker/u8:2+events_unbound19:25:230
1905754998678,6cyclictest1950447-21kworker/u8:1+flush-179:021:40:010
1905755998577,6cyclictest1934257-21kworker/u8:1+flush-179:020:45:011
1905754998474,7cyclictest1934257-21kworker/u8:1+events_unbound20:45:040
1905754998375,5cyclictest1908779-21kworker/u8:2+flush-179:020:15:200
1905755998272,8cyclictest1981225-21/usr/sbin/munin23:05:221
1905754998276,5cyclictest1919247-21kworker/u8:0+flush-179:019:55:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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