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2026-04-14 - 20:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Tue Apr 14, 2026 12:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3861950998981,6cyclictest3907533-21latency_hist09:30:011
3861950998981,6cyclictest3907533-21latency_hist09:30:011
3861950998880,6cyclictest3879709-21latency_hist08:05:001
3861948997868,7cyclictest3929319-21kworker/u8:0+flush-179:010:50:000
3861956997664,10cyclictest3923505-21turbostat10:20:003
3861948997163,6cyclictest3904602-21/usr/sbin/munin09:20:240
3861950996859,7cyclictest266-21systemd-journal08:00:011
4577091670,14ptp4l431rcuc/307:10:003
3861948996759,6cyclictest3955573-21latency_hist12:00:010
3861950996659,5cyclictest3957170-21latency_hist12:05:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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