You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-18 - 06:52
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Fri Sep 18, 2026 00:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
322788199168153,11cyclictest3321210-40mandb00:00:001
322787999151138,10cyclictest609153-21cups-browsed00:00:010
322787999139128,8cyclictest3271070-21latency_hist21:25:010
322787999132115,5cyclictest3224806-21kworker/u8:3+events_unbound19:20:010
322787999129119,8cyclictest3228441-21kworker/u8:1+events_unbound19:15:010
322787999128120,5cyclictest3245343-21kworker/u8:3+flush-179:020:30:150
322787999128117,8cyclictest3285906-21latency_hist22:10:000
322787999127118,7cyclictest3310429-21kworker/u8:0+flush-179:023:40:000
322787999126119,5cyclictest3245343-21kworker/u8:3+flush-179:021:15:000
322787999125119,4cyclictest3272639-21kworker/u8:0+flush-179:021:35:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional