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2025-12-30 - 06:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Tue Dec 30, 2025 00:44:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
332335499114104,7cyclictest3417140-40logrotate00:00:010
33233549910698,5cyclictest3391154-21latency_hist22:40:010
3323358999283,7cyclictest3410778-21latency_hist23:40:021
3323354998679,5cyclictest3413947-21kworker/u8:1+events_unbound23:50:000
3323358998478,5cyclictest3378387-21kworker/u8:1+flush-179:022:10:001
3323358998377,5cyclictest3321764-21kworker/u8:2+flush-179:019:40:001
3323358998175,5cyclictest3381030-21kworker/u8:2+flush-179:022:35:001
3323358997869,7cyclictest3347910-21latency_hist20:25:011
3323354997870,6cyclictest3334928-21apt-get19:45:000
3323358997671,3cyclictest3321764-21kworker/u8:2+events_unbound19:50:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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