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2026-04-10 - 08:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Fri Apr 10, 2026 00:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4057601999277,12cyclictest266-21systemd-journal20:50:010
4057602999178,10cyclictest4150894-40mandb00:00:011
4057601999078,10cyclictest4150894-40mandb00:00:010
4057602998879,6cyclictest4146078-21kworker/u8:0+flush-179:023:45:221
4057602998478,3cyclictest4077411-21kworker/u8:0+flush-179:020:25:011
4057601998475,7cyclictest4062509-21/usr/sbin/munin19:25:220
4057607998174,5cyclictest4067050-21turbostat19:40:003
4057602998074,4cyclictest4107427-21kworker/u8:2+flush-179:022:15:261
4057601998067,10cyclictest266-21systemd-journal20:15:010
4057602997466,6cyclictest4157256-21kworker/u8:0+flush-179:000:35:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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