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2026-04-23 - 13:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Thu Apr 23, 2026 00:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
23202119911296,12cyclictest2326463-21latency_hist19:30:011
23202099910798,6cyclictest2410051-21kworker/u8:2+flush-179:000:00:010
23202099910596,6cyclictest2341298-21latency_hist20:15:020
23202119910496,6cyclictest2324913-21kworker/u8:2+events_unbound19:30:021
2320209999587,5cyclictest2386116-21latency_hist22:35:010
2320211999383,7cyclictest2320069-21latency_hist19:10:011
2320211999181,7cyclictest2398843-21latency_hist23:15:011
2320211998880,6cyclictest2323278-21latency_hist19:20:011
2320211998578,5cyclictest2390893-21latency_hist22:50:011
2320211998479,4cyclictest2366197-21kworker/u8:0+events_unbound22:05:241
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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