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2026-05-02 - 02:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Fri May 01, 2026 12:44:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
729604999887,9cyclictest822993-21apt-get12:00:000
729604999687,6cyclictest732754-21latency_hist07:20:010
729604999589,4cyclictest762000-21kworker/u8:2+events_unbound09:15:240
729604998980,7cyclictest715475-21kworker/u8:2+events_unbound07:30:000
729604998680,4cyclictest776582-21kworker/u8:1+events_unbound09:45:000
729604998579,4cyclictest794137-21kworker/u8:3+events_unbound11:24:590
729604998376,5cyclictest715475-21kworker/u8:2+flush-179:007:35:220
729604998375,6cyclictest750588-21kworker/u8:0+events_unbound08:20:000
729604998277,4cyclictest794137-21kworker/u8:3+flush-179:011:40:010
729604998273,6cyclictest826445-21latency_hist12:10:020
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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