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2026-04-17 - 00:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Thu Apr 16, 2026 12:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9938949910191,7cyclictest1004985-21latency_hist07:45:000
993899999080,7cyclictest1056965-21latency_hist10:25:011
993899998675,9cyclictest1024088-21latency_hist08:45:011
993894998474,8cyclictest1099645-21latency_hist12:35:010
993899998359,22cyclictest1055369-21latency_hist10:20:011
993899998172,6cyclictest1042114-21latency_hist09:40:021
993899997868,8cyclictest1032301-21latency_hist09:10:011
993899997769,5cyclictest1040516-21latency_hist09:35:011
993899997768,6cyclictest1065178-21latency_hist10:50:011
993899997768,6cyclictest1065178-21latency_hist10:50:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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