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2026-03-21 - 13:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot6.osadl.org (updated Sat Mar 21, 2026 00:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
343162299115105,7cyclictest3493909-21latency_hist22:25:001
34316229911283,25cyclictest3524690-40mandb00:00:001
34316189910999,8cyclictest3473168-21latency_hist21:20:010
3431618999384,7cyclictest3445854-21latency_hist19:55:000
3431622999181,7cyclictest3513260-21latency_hist23:25:011
3431618998978,9cyclictest266-21systemd-journal00:05:000
3431622998774,9cyclictest3487545-21latency_hist22:05:001
3431618998783,2cyclictest3473219-21kworker/u8:0+events_unbound21:35:000
3431618998782,3cyclictest3499184-21/usr/sbin/munin22:40:210
3431622998576,7cyclictest3511668-21latency_hist23:20:021
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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