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2025-11-19 - 15:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot6.osadl.org (updated Wed Nov 19, 2025 00:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27747599120107,11cyclictest371543-40logrotate00:00:000
2774759910799,6cyclictest381192-21kworker/u8:2+events_unbound00:40:000
2774809910292,7cyclictest344238-21latency_hist22:35:011
277475999994,3cyclictest270346-21kworker/u8:3+events_unbound19:15:280
277480999582,9cyclictest382751-21latency_hist00:35:011
277475999382,8cyclictest350859-21latency_hist22:55:020
277475998982,5cyclictest350894-21kworker/u8:3+flush-179:023:05:000
277475998982,5cyclictest332071-21latency_hist22:00:010
277480998773,10cyclictest347431-21latency_hist22:45:011
277475998581,3cyclictest327334-21kworker/u8:2+flush-179:022:15:260
277475998379,3cyclictest261321-21kworker/u8:1+flush-179:019:25:260
277475998370,10cyclictest319338-21latency_hist21:20:010
277480997867,8cyclictest271-21systemd-journal23:55:001
277475997871,5cyclictest332110-21kworker/u8:0+events_unbound22:00:190
277475997569,5cyclictest297813-21kworker/u8:1+events_unbound20:10:280
277475997563,4cyclictest371616-21kworker/u8:1+events_unbound00:05:270
277480997463,8cyclictest349274-21latency_hist22:50:021
277475997466,6cyclictest297813-21kworker/u8:1+flush-179:020:25:010
277475997466,6cyclictest293534-21kworker/u8:0+events_unbound20:00:010
277475997466,6cyclictest293534-21kworker/u8:0+events_unbound20:00:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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