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2026-07-09 - 14:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot6.osadl.org (updated Thu Jul 09, 2026 00:44:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
341189499126117,6cyclictest3510475-21latency_hist00:15:011
341189199121114,5cyclictest3469573-21kworker/u8:0+events_unbound22:15:000
341189199121114,5cyclictest3469573-21kworker/u8:0+events_unbound22:15:000
341189199120111,6cyclictest3443874-21latency_hist20:50:000
341189199118111,4cyclictest3419987-21kworker/u8:3+flush-179:020:00:150
341189199114106,5cyclictest3481258-21kworker/u8:1+events_unbound22:45:230
341189199112103,6cyclictest3418412-21latency_hist19:30:010
34118919910995,10cyclictest1213033-21systemd-journal22:35:140
341189199108102,4cyclictest3427932-21kworker/u8:0+flush-179:020:10:160
341189199107100,5cyclictest3489259-21kworker/u8:1+events_unbound23:10:000
34118919910599,4cyclictest3449315-21kworker/u8:0+flush-179:021:40:160
34118919910590,10cyclictest799521-21cups-browsed00:00:010
34118919910495,6cyclictest3456023-21kworker/u8:2+flush-179:022:10:000
3411891999985,10cyclictest3446122-21kworker/u8:1+flush-179:021:00:210
3411891999985,10cyclictest3446122-21kworker/u8:1+flush-179:021:00:210
3411894999792,4cyclictest3449315-21kworker/u8:0+events_unbound21:45:241
3411891999590,3cyclictest3500911-21kworker/u8:3+flush-179:000:35:200
3411891999488,4cyclictest3504049-21latency_hist23:55:010
3411891999485,6cyclictest3469573-21kworker/u8:0+flush-179:022:55:010
3411891999483,8cyclictest3477808-21latency_hist22:35:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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