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2025-12-27 - 08:46
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot6.osadl.org (updated Sat Dec 27, 2025 00:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32673509911388,8cyclictest3281837-21latency_hist19:55:020
3267350998575,7cyclictest3308900-21latency_hist21:20:020
3267350998575,7cyclictest3308900-21latency_hist21:20:010
3267354998473,8cyclictest3273623-21latency_hist19:30:021
3267350998377,5cyclictest3350547-21kworker/u8:0+events_unbound23:50:250
3267350998174,5cyclictest3297791-21kworker/u8:3+events_unbound20:50:260
3267350998174,5cyclictest3297791-21kworker/u8:3+events_unbound20:50:260
3267350998073,5cyclictest3346449-21kworker/u8:1+events_unbound23:45:020
3267350998073,4cyclictest3320104-21kworker/u8:2+events_unbound22:00:010
3267350997969,8cyclictest3304374-21/usr/sbin/munin21:05:250
3267354997870,6cyclictest3350804-21/usr/sbin/munin23:30:231
3267354997861,14cyclictest3294490-21kworker/u8:2+flush-179:020:44:591
3267350997770,4cyclictest3320104-21kworker/u8:2+events_unbound22:10:130
3267350997570,4cyclictest3278368-21kworker/u8:0+flush-179:020:45:230
3267350997569,4cyclictest3350547-21kworker/u8:0+flush-179:023:55:170
3267350997568,5cyclictest3297791-21kworker/u8:3+flush-179:021:20:140
3267354997368,4cyclictest3247536-21kworker/u8:3+flush-179:019:30:231
3267350997367,5cyclictest3264976-21kworker/u8:0+flush-179:019:20:230
3267354997263,6cyclictest3307312-21latency_hist21:15:011
3267350997266,4cyclictest3333032-21kworker/u8:2+flush-179:022:35:180
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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