You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-03 - 21:10
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot6.osadl.org (updated Thu Sep 03, 2026 12:44:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
148745999145134,8cyclictest1586569-21latency_hist12:15:000
148745999137126,8cyclictest1501963-21latency_hist07:55:010
148745999134121,9cyclictest1506803-21kworker/u8:0+flush-179:008:15:010
148746099132122,4cyclictest1584975-21kworker/u8:1+events_unbound12:10:211
148746099129123,5cyclictest1562243-21kworker/u8:2+events_unbound11:15:231
148746099128116,10cyclictest1213033-21systemd-journal12:25:001
148745999128120,5cyclictest1562243-21kworker/u8:2+events_unbound11:25:250
148745999128118,7cyclictest1506803-21kworker/u8:0+flush-179:008:15:210
148746099127122,4cyclictest1489173-21kworker/u8:0+events_unbound07:20:241
148746099126117,7cyclictest1552100-21kworker/u8:3+flush-179:011:10:011
148745999125114,8cyclictest1593184-21kworker/u8:1+events_unbound12:40:000
148745999125110,11cyclictest1213033-21systemd-journal08:20:230
148745999124116,5cyclictest1552100-21kworker/u8:3+flush-179:010:45:000
148746099123113,7cyclictest1593197-21latency_hist12:35:001
148745999122114,4cyclictest1580193-21kworker/u8:1+events_unbound11:55:130
148745999121115,4cyclictest1562243-21kworker/u8:2+flush-179:011:02:440
148745999121110,8cyclictest1506744-21latency_hist08:10:010
148746099120115,4cyclictest1484295-21kworker/u8:2+events_unbound07:10:261
148745999119108,8cyclictest1542786-21kworker/u8:0+events_unbound09:59:590
148745999118108,7cyclictest1546003-21latency_hist10:10:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional