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2026-07-16 - 14:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot6.osadl.org (updated Thu Jul 16, 2026 00:44:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
135112999138123,10cyclictest1440380-21kworker/u8:1+flush-179:000:00:010
135113299130124,4cyclictest1367770-21kworker/u8:1+events_unbound20:05:241
135113299129112,14cyclictest1213033-21systemd-journal00:05:001
13511299912698,16cyclictest1389504-21latency_hist21:10:000
135112999126116,7cyclictest1399053-21latency_hist21:40:010
1351129991251,120cyclictest1-21systemd19:50:000
135112999123109,10cyclictest1421862-21apt-get22:50:000
135112999121109,9cyclictest1213033-21systemd-journal19:35:000
13511329912095,7cyclictest1457249-21latency_hist00:40:011
13511329912095,7cyclictest1457249-21latency_hist00:40:011
135113299120112,6cyclictest1419715-21kworker/u8:0+events_unbound22:45:001
135113299119108,8cyclictest1415200-21kworker/u8:1+flush-179:022:30:031
135113299119108,8cyclictest1415200-21kworker/u8:1+flush-179:022:30:021
135113299112106,4cyclictest1436409-21kworker/u8:2+flush-179:023:50:001
135113299111103,5cyclictest1359983-21kworker/u8:3+events_unbound20:20:241
135112999111104,4cyclictest1370437-21kworker/u8:2+flush-179:020:15:210
135113299109103,4cyclictest1447728-21kworker/u8:2+events_unbound00:15:231
135113299109103,4cyclictest1447728-21kworker/u8:2+events_unbound00:15:231
135113299109102,6cyclictest1333436-21kworker/u8:3+flush-179:019:20:011
13511299910999,7cyclictest1402269-21kworker/u8:3+flush-179:022:15:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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