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2026-01-10 - 09:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackeslot6.osadl.org (updated Sat Jan 10, 2026 00:44:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7350929910696,6cyclictest751167-21latency_hist20:00:011
7350889910192,6cyclictest823546-21latency_hist23:45:010
7350889910192,6cyclictest823546-21latency_hist23:45:000
735088999488,5cyclictest752998-21kworker/u8:1+events_unbound21:00:000
735092999383,8cyclictest831550-21latency_hist00:10:011
735088998982,6cyclictest786403-21kworker/u8:1+events_unbound22:10:020
735088998577,6cyclictest825165-21kworker/u8:3+flush-179:000:20:010
735092998375,6cyclictest821951-21latency_hist23:40:021
735092998350,32cyclictest0-21swapper/121:27:591
735092998175,4cyclictest752746-21kworker/u8:0+flush-179:020:05:241
735088998177,2cyclictest1-21systemd19:15:000
735088998174,4cyclictest799708-21kworker/u8:2+events_unbound22:35:230
735088998171,7cyclictest781649-21latency_hist21:35:010
735088998075,3cyclictest786403-21kworker/u8:1+flush-179:021:50:200
735088997974,3cyclictest824279-21kworker/u8:2+flush-179:023:50:190
735092997762,5cyclictest737651-21kworker/u8:1+events_unbound19:25:021
735088997671,4cyclictest825165-21kworker/u8:3+events_unbound00:15:230
735088997670,5cyclictest802902-21kworker/u8:1+events_unbound23:15:240
735088997668,6cyclictest767075-21latency_hist20:50:010
735092997565,7cyclictest817181-21latency_hist23:25:001
735088997568,5cyclictest802902-21kworker/u8:1+events_unbound23:05:210
735088997468,4cyclictest825165-21kworker/u8:3+events_unbound00:35:130
735092997365,6cyclictest741662-21kworker/u8:2+flush-179:020:00:241
735088997363,4cyclictest741662-21kworker/u8:2+events_unbound19:40:220
735088997263,7cyclictest806273-21/usr/sbin/munin22:50:230
735088997164,6cyclictest812445-21kworker/u8:0+flush-179:023:30:000
735088997164,5cyclictest791236-21kworker/u8:3+events_unbound22:30:180
735088997164,5cyclictest783492-21kworker/u8:0+flush-179:021:40:230
735088997164,5cyclictest737651-21kworker/u8:1+events_unbound19:20:030
735092997065,4cyclictest740562-21kworker/u8:0+flush-179:019:34:551
735092997064,5cyclictest799708-21kworker/u8:2+flush-179:023:15:001
735092997064,5cyclictest787987-21kworker/u8:0+flush-179:021:59:551
735092997064,4cyclictest791236-21kworker/u8:3+flush-179:022:15:011
735088997063,6cyclictest779544-21kworker/u8:3+flush-179:021:50:000
735092996961,6cyclictest740562-21kworker/u8:0+flush-179:019:40:001
735092996960,7cyclictest740268-21/usr/sbin/munin19:25:241
735088996960,7cyclictest796456-21kworker/u8:0+flush-179:022:25:200
735092996862,4cyclictest799708-21kworker/u8:2+flush-179:023:00:011
735092996862,4cyclictest787987-21kworker/u8:0+events_unbound22:05:241
735088996860,6cyclictest792790-21latency_hist22:10:000
735092996761,4cyclictest744812-21kworker/u8:1+flush-179:019:50:011
735092996757,8cyclictest838180-21latency_hist00:30:021
735088996763,3cyclictest737651-21kworker/u8:1+events_unbound19:20:010
735088996761,4cyclictest799708-21kworker/u8:2+flush-179:023:05:010
735088996761,4cyclictest762165-21kworker/u8:0+flush-179:020:35:210
735092996662,3cyclictest799708-21kworker/u8:2+events_unbound22:40:191
735092996559,5cyclictest762165-21kworker/u8:0+events_unbound20:55:001
735092996558,5cyclictest762165-21kworker/u8:0+flush-179:020:40:011
735092996556,6cyclictest788012-21latency_hist21:55:021
735092996358,4cyclictest735005-21kworker/u8:0+flush-179:019:15:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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