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2026-06-22 - 05:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackeslot6.osadl.org (updated Mon Jun 22, 2026 00:44:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
350860899133128,4cyclictest3602922-21kworker/u8:4+events_unbound00:04:001
350860499115107,5cyclictest3516672-21kworker/u8:0+flush-179:019:45:000
350860499115106,6cyclictest3570271-21latency_hist22:20:010
350860899114106,6cyclictest3572110-21kworker/u8:0+events_unbound22:30:251
350860899110103,4cyclictest3612250-21latency_hist00:30:011
35086089910895,4cyclictest3528083-21kworker/u8:3+events_unbound20:25:231
350860899107102,4cyclictest3521646-21kworker/u8:1+flush-179:020:00:251
35086089910489,11cyclictest3602666-40mandb00:00:001
35086089910193,6cyclictest3591281-21kworker/u8:1+events_unbound23:45:201
35086049910195,4cyclictest3591281-21kworker/u8:1+flush-179:023:45:010
35086089910091,7cyclictest3555469-21kworker/u8:3+events_unbound22:05:021
35086049910087,10cyclictest1213033-21systemd-journal20:10:000
3508608999993,4cyclictest3578279-21kworker/u8:3+events_unbound23:05:151
3508608999885,6cyclictest3506989-21kworker/u8:2+events_unbound19:10:231
3508604999788,6cyclictest3565294-21kworker/u8:1+flush-179:022:10:000
3508608999489,4cyclictest3539487-21kworker/u8:0+events_unbound21:55:241
3508608999488,4cyclictest3550625-21kworker/u8:2+flush-179:021:30:211
3508608999384,6cyclictest3528083-21kworker/u8:3+events_unbound20:15:201
3508604999381,8cyclictest3572111-21kworker/u8:1+events_unbound22:50:010
3508604999284,6cyclictest3605880-21latency_hist00:10:010
3508608999181,7cyclictest3511922-21latency_hist19:20:021
3508608999086,3cyclictest3612489-21kworker/u8:1+flush-179:000:35:231
3508608999085,4cyclictest2354735-21kworker/u8:4+events_unbound19:25:251
3508604999083,5cyclictest3612489-21kworker/u8:1+flush-179:000:35:200
3508604999083,5cyclictest3521646-21kworker/u8:1+flush-179:019:50:020
3508604999083,5cyclictest3521646-21kworker/u8:1+flush-179:019:50:010
3508608998984,4cyclictest3521776-21kworker/u8:3+flush-179:019:55:271
3508608998983,4cyclictest3528083-21kworker/u8:3+flush-179:020:45:211
3508608998982,5cyclictest3602922-21kworker/u8:4+events_unbound00:05:161
3508608998883,3cyclictest3555469-21kworker/u8:3+flush-179:022:15:221
3508608998783,3cyclictest3578279-21kworker/u8:3+events_unbound23:10:241
3508608998781,4cyclictest3587448-21kworker/u8:0+flush-179:023:30:211
3508604998773,11cyclictest1213033-21systemd-journal20:32:240
3508608998681,3cyclictest3572110-21kworker/u8:0+flush-179:022:45:201
3508608998680,4cyclictest3544334-21kworker/u8:3+flush-179:021:10:141
3508608998580,4cyclictest3567755-21kworker/u8:0+events_unbound22:10:231
3508608998579,4cyclictest3539487-21kworker/u8:0+flush-179:021:25:191
3508608998574,4cyclictest3529975-21kworker/u8:1+events_unbound20:40:161
3508608998477,5cyclictest3539487-21kworker/u8:0+events_unbound21:45:031
3508604998477,5cyclictest3607340-21kworker/u8:0+flush-179:000:25:010
3508608998378,3cyclictest3562093-21kworker/u8:2+flush-179:022:00:201
3508608998277,4cyclictest3587448-21kworker/u8:0+events_unbound23:20:251
3508608998177,3cyclictest3516725-21kworker/u8:2+flush-179:019:45:211
3508608998177,3cyclictest3516725-21kworker/u8:2+flush-179:019:45:211
3508608998176,4cyclictest3528083-21kworker/u8:3+flush-179:020:10:241
3508608998176,3cyclictest3555469-21kworker/u8:3+flush-179:021:50:231
3508608998176,3cyclictest3528083-21kworker/u8:3+flush-179:020:35:131
3508608998176,3cyclictest3528083-21kworker/u8:3+flush-179:020:35:131
3508608998076,3cyclictest3539544-21kworker/u8:2+flush-179:020:50:261
3508608998074,5cyclictest3607449-21kworker/u8:2+flush-179:000:30:201
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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