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2026-02-11 - 21:17
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #f, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackfslot5s.osadl.org (updated Wed Feb 11, 2026 12:43:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
21312994840,5cyclictest0-21swapper/11
21312994739,5cyclictest0-21swapper/11
21312994737,5cyclictest0-21swapper/11
21317994628,14cyclictest0-21swapper/11
21312994638,5cyclictest0-21swapper/11
21312994638,5cyclictest0-21swapper/11
21312994638,5cyclictest0-21swapper/11
21312994537,5cyclictest0-21swapper/11
21312994537,5cyclictest0-21swapper/11
21312994537,5cyclictest0-21swapper/11
21312994436,5cyclictest0-21swapper/11
21312994436,5cyclictest0-21swapper/11
21312994335,5cyclictest0-21swapper/11
21312994335,5cyclictest0-21swapper/11
21317994227,12cyclictest0-21swapper/11
21312994234,5cyclictest0-21swapper/11
21312994234,5cyclictest0-21swapper/11
21312994234,5cyclictest0-21swapper/11
21312994234,5cyclictest0-21swapper/11
21312994234,5cyclictest0-21swapper/11
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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