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2026-06-04 - 18:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot4.osadl.org (updated Thu Jun 04, 2026 12:44:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24552902317275,27sleep00-21swapper/007:07:510
24553072273228,29sleep10-21swapper/107:08:031
24747242700,3chrt0-21swapper/007:55:150
25447852680,3sleep00-21swapper/010:02:290
26150032640,20sleep10-21swapper/111:37:451
179699570,6rtkit-daemon1795-21rtkit-daemon08:00:151
179699520,4rtkit-daemon1795-21rtkit-daemon11:53:201
179699510,4rtkit-daemon1795-21rtkit-daemon09:32:240
179699510,3rtkit-daemon1795-21rtkit-daemon09:25:200
179699490,3rtkit-daemon1795-21rtkit-daemon08:09:391
179699490,3rtkit-daemon1795-21rtkit-daemon07:49:421
179699490,3rtkit-daemon1795-21rtkit-daemon07:16:431
179699480,3rtkit-daemon1795-21rtkit-daemon08:11:431
179699480,3rtkit-daemon1795-21rtkit-daemon07:44:551
179699480,21rtkit-daemon1795-21rtkit-daemon09:01:380
179699470,4rtkit-daemon1795-21rtkit-daemon11:43:001
179699470,4rtkit-daemon1795-21rtkit-daemon11:00:491
179699470,3rtkit-daemon1795-21rtkit-daemon11:45:081
179699470,3rtkit-daemon1795-21rtkit-daemon08:56:251
179699470,3rtkit-daemon1795-21rtkit-daemon07:14:551
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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