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2026-04-26 - 19:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot4.osadl.org (updated Sun Apr 26, 2026 12:44:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
912112262192,26sleep10-21swapper/107:07:481
911452260183,27sleep00-21swapper/007:07:060
2334512620,2sleep0233452-21sensors11:10:230
179699560,4rtkit-daemon1795-21rtkit-daemon11:35:140
179699530,4rtkit-daemon1795-21rtkit-daemon10:08:580
179699530,4rtkit-daemon1795-21rtkit-daemon10:08:580
179699530,4rtkit-daemon1795-21rtkit-daemon09:20:061
2767952520,4sleep10-21swapper/112:08:221
179699520,3rtkit-daemon1795-21rtkit-daemon12:15:220
179699510,4rtkit-daemon1795-21rtkit-daemon12:13:500
179699510,4rtkit-daemon1795-21rtkit-daemon11:17:301
1527462510,1chrt152202-21/usr/sbin/munin09:25:181
179699500,4rtkit-daemon1795-21rtkit-daemon08:41:151
179699500,3rtkit-daemon1795-21rtkit-daemon10:20:280
179699430,3rtkit-daemon1795-21rtkit-daemon12:25:101
179699420,4rtkit-daemon1795-21rtkit-daemon10:40:221
179699390,4rtkit-daemon139881-21diskmemload10:12:070
179699390,3rtkit-daemon0-21swapper/109:37:011
179699380,3rtkit-daemon0-21swapper/110:28:451
9154899370,35cyclictest0-21swapper/109:15:261
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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