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2025-12-18 - 14:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackcslot4.osadl.org (updated Thu Dec 18, 2025 12:44:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19094342282219,49sleep00-21swapper/007:08:550
19092712264193,27sleep10-21swapper/107:07:081
19630252760,10sleep126-21ksoftirqd/109:20:201
179699570,5rtkit-daemon1979148-21strings10:00:190
179699570,4rtkit-daemon0-21swapper/012:15:350
179699560,4rtkit-daemon1795-21rtkit-daemon10:41:331
179699550,4rtkit-daemon1795-21rtkit-daemon09:53:520
179699550,4rtkit-daemon0-21swapper/010:36:410
179699550,3rtkit-daemon0-21swapper/011:12:090
179699550,3rtkit-daemon0-21swapper/008:05:050
179699540,3rtkit-daemon0-21swapper/010:34:430
179699540,3rtkit-daemon0-21swapper/010:05:370
179699540,3rtkit-daemon0-21swapper/009:30:170
179699530,4rtkit-daemon1795-21rtkit-daemon10:50:530
179699530,4rtkit-daemon1795-21rtkit-daemon10:14:130
179699520,3rtkit-daemon1795-21rtkit-daemon10:45:510
179699520,3rtkit-daemon1795-21rtkit-daemon09:48:100
179699520,3rtkit-daemon0-21swapper/011:15:580
179699520,3rtkit-daemon0-21swapper/007:32:030
179699510,4rtkit-daemon1795-21rtkit-daemon07:45:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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